世傑 周 的照片

查看斯高帕斯 (Scopus) 概要

周 世傑

教授

按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
1900 …2023

每年研究成果

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Conference contribution

搜尋結果

  • 2012

    Testing strategies for a 9T sub-threshold SRAM

    Yang, H. Y., Lin, C. W., Chen, H. H., Chao, C-T., Tu, M. H., Jou, S-J. & Chuang, C. T., 1 12月 2012, ITC 2012 - International Test Conference 2012, Proceedings. 6401577. (Proceedings - International Test Conference).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）

  • Welcome from the general chairs

    Brillouët, M., Jou, S-J. & Yue, P., 16 7月 2012, 2012 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2012 - Proceedings of Technical Papers. 6210135. (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).

    研究成果: Conference contribution › 同行評審

  • Welcome from the general chairs

    Brillouët, M., Jou, S-J. & Yue, P., 25 7月 2012, 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers.

    研究成果: Conference contribution › 同行評審

  • 2011

    0.5 V DD digitally controlled oscillators design with compensation techniques for PVT variations

    Chang, C. W., Jou, S-J. & Chu, Y. H., 1 12月 2011, Proceedings - 2011 IEEE 9th International Conference on ASIC, ASICON 2011. p. 606-609 4 p. 6157278. (Proceedings of International Conference on ASIC).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）

  • 8T Single-ended sub-threshold SRAM with cross-point data-aware write operation

    Chiu, Y. W., Lin, J. Y., Tu, M. H., Jou, S-J. & Chuang, C. T., 19 9月 2011, IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011. p. 169-174 6 p. 5993631. (Proceedings of the International Symposium on Low Power Electronics and Design).

    研究成果: Conference contribution › 同行評審

    20 引文 斯高帕斯（Scopus）

  • A high-performance low V MIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control

    Yang, H. I., Yang, S. C., Hsia, M. C., Lin, Y. W., Lin, Y. W., Chen, C. H., Chang, C. S., Lin, G. C., Chen, Y. N., Chuang, C. T., Hwang, W., Jou, S-J., Lien, N. C., Li, H. Y., Lee, K. D., Shih, W. C., Wu, Y. P., Lee, W. T. & Hsu, C. C., 28 12月 2011, Proceedings - IEEE International SOC Conference, SOCC 2011. p. 197-200 4 p. 6085080. (International System on Chip Conference).

    研究成果: Conference contribution › 同行評審

    6 引文 斯高帕斯（Scopus）

  • A SC/OFDM dual mode frequency-domain equalizer for 60GHz multi-gbps wireless transmission

    Yeh, F. C., Liu, T. Y., Wei, T. C., Liu, W. C. & Jou, S-J., 28 6月 2011, Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011. p. 406-409 4 p. 5783559. (Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011).

    研究成果: Conference contribution › 同行評審

    7 引文 斯高帕斯（Scopus）

  • Design and implementation of synchronization detection for IEEE 802.15.3c

    Huang, Y. S., Liu, W. C. & Jou, S-J., 28 6月 2011, Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011. p. 83-86 4 p. 5783583. (Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011).

    研究成果: Conference contribution › 同行評審

    8 引文 斯高帕斯（Scopus）

  • Digitally-controlled cell-based oscillator with multi-phase differential outputs

    Su, M. C. & Jou, S-J., 1 12月 2011, Proceedings - 2011 IEEE 9th International Conference on ASIC, ASICON 2011. p. 610-613 4 p. 6157279. (Proceedings of International Conference on ASIC).

    研究成果: Conference contribution › 同行評審

    4 引文 斯高帕斯（Scopus）

  • Low computational complexity pitch based VAD for dynamic environment in hearing aids

    Chen, Y. J., Wei, C. W., Meng, Y. L. & Jou, S-J., 19 9月 2011, Information and Management Engineering - International Conference, ICCIC 2011, Proceedings. PART 5 編輯 p. 10-17 8 p. (Communications in Computer and Information Science; 卷 235 CCIS, 編號 PART 5).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）

  • Low power InfomaxICA with compensation strategy for binaural hearing-aid

    Yi, F. C., Huang, C. W., Chi, T-S. & Jou, S-J., 2 8月 2011, 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011. p. 2083-2086 4 p. 5938008. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution › 同行評審

  • 2010

    A 5.7Gbps row-based layered scheduling LDPC decoder for IEEE 802.15.3c applications

    Hung, S. Y., Yen, S. W., Chen, C. L., Chang, H-C., Jou, S-J. & Lee, C-Y., 1 12月 2010, 2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010. p. 309-312 4 p. 5716617. (2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010).

    研究成果: Conference contribution › 同行評審

    11 引文 斯高帕斯（Scopus）

  • A low-power mandarin-specific hearing aid chip

    Wei, C. W., Kuo, Y. T., Chang, K. C., Tsai, C. C., Lin, J. Y., FanJiang, Y., Tu, M. H., Liu, C-W., Chang, T-S. & Jou, S-J., 1 12月 2010, 2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010. p. 333-336 4 p. 5716623. (2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010).

    研究成果: Conference contribution › 同行評審

    14 引文 斯高帕斯（Scopus）

  • Perceptual multiband spectral subtraction for noise reduction in hearing aids

    Wei, C. W., Tsai, C. C., Chang, T-S. & Jou, S-J., 1 12月 2010, Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010. p. 692-695 4 p. 5774973. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）
  • 2009

    10Gbps decision feedback equalizer with dynamic lookahead decision loop

    Lin, Y. C., Shiue, M. T. & Jou, S-J., 26 10月 2009, 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009. p. 1839-1842 4 p. 5118136. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution › 同行評審

    12 引文 斯高帕斯（Scopus）

  • A 0.92mm2 23.4mW fully-compliant CTC decoder for WiMAX 802.16e application

    Yen, S. W., Hu, M. C., Chen, C. L., Chang, H-C., Jou, S-J. & Lee, C-Y., 1 12月 2009, 2009 IEEE Custom Integrated Circuits Conference, CICC '09. IEEE, p. 191-194 4 p. 5280876. (Proceedings of the Custom Integrated Circuits Conference).

    研究成果: Conference contribution › 同行評審

  • A micro-network on chip with 10-Gb/s transmission link

    Liu, W. C., Lin, C. H., Jou, S-J., Lu, H. W., Su, C-C., Hong, K. W., Cheng, K. H., Yang, S. W. & Sheu, M. H., 1 12月 2009, Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009. p. 277-280 4 p. 5357256. (Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）

  • A spread spectrum clock generator with phase-rotation algorithm for 6Gbps clock and data recovery

    Lin, C. H., Huang, Y. Y., Li, S. R., Cheng, Y. P. & Jou, S-J., 1 12月 2009, ASICON 2009 - Proceedings, 2009 8th IEEE International Conference on ASIC. p. 387-390 4 p. 5351414. (ASICON 2009 - Proceedings 2009 8th IEEE International Conference on ASIC).

    研究成果: Conference contribution › 同行評審

  • Asymmetrical write-assist for single-ended SRAM operation

    Lin, J. Y., Tu, M. H., Tsai, M. C., Jou, S-J. & Chuang, C. T., 1 12月 2009, Proceedings - IEEE International SOC Conference, SOCC 2009. p. 101-104 4 p. 5398086. (Proceedings - IEEE International SOC Conference, SOCC 2009).

    研究成果: Conference contribution › 同行評審

    4 引文 斯高帕斯（Scopus）

  • Novel FFT processor with parallel-in-parallel-out in normal order

    Hu, H. S., Chen, H. Y. & Jou, S-J., 1 12月 2009, 2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09. p. 150-153 4 p. 5158117. (2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09).

    研究成果: Conference contribution › 同行評審

    2 引文 斯高帕斯（Scopus）
  • 2008

    A reconfigurable MAC architecture implemented with mixed-Vt standard cell library

    Wang, L. R., Chiu, Y. W., Hu, C. L., Tu, M. H., Jou, S-J. & Lee, C. L., 19 9月 2008, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008. p. 3426-3429 4 p. 4542195. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution › 同行評審

    2 引文 斯高帕斯（Scopus）

  • A well-structured modified booth multiplier design

    Wang, L. R., Jou, S-J. & Lee, C. L., 5 9月 2008, 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT. p. 85-88 4 p. 4542418. (2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT).

    研究成果: Conference contribution › 同行評審

    12 引文 斯高帕斯（Scopus）

  • Symbol and carrier frequency offset synchronization for IEEE802.16e

    Lin, J. N., Chen, H. Y., Wei, T. C. & Jou, S-J., 19 9月 2008, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008. p. 3082-3085 4 p. 4542109. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution › 同行評審

    3 引文 斯高帕斯（Scopus）
  • 2007

    A 6Gbps serial link transmitter with pre-emphasis

    Chu, C. M., Chuang, C. H., Lin, C. H. & Jou, S-J., 28 9月 2007, 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers. 4239405. (2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers).

    研究成果: Conference contribution › 同行評審

    5 引文 斯高帕斯（Scopus）

  • Adaptive quadrature clock generator

    Huang, J. H., Lin, C. H. & Jou, S-J., 1 10月 2007, 2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006 - Proceedings of Technical Papers. p. 203-206 4 p. 4027532. (2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006 - Proceedings of Technical Papers).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）

  • Concurrent Digital Adaptive Decision Feedback Equalizer for 10GBase-LX4 Ethernet System

    Lin, C. S., Lin, Y. C., Jou, S-J. & Shiou, M. T., 1 1月 2007, Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007. Institute of Electrical and Electronics Engineers Inc., p. 289-292 4 p. 4405735. (Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007).

    研究成果: Conference contribution › 同行評審

    8 引文 斯高帕斯（Scopus）

  • Low power and power aware design for DVB-T/H baseband inner receiver

    Tseng, C. Y., Wei, T. C., Liu, W. C. & Jou, S-J., 28 9月 2007, 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers. 4239437. (2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers).

    研究成果: Conference contribution › 同行評審

  • Mixed-VTH (MVT) CMOS circuit design for low power cell libraries

    Lin, J. Y., Wang, L. R., Hu, C. L. & Jou, S-J., 1 12月 2007, Proceedings - 20th Anniversary IEEE International SOC Conference. p. 181-184 4 p. 4545454. (Proceedings - 20th Anniversary IEEE International SOC Conference).

    研究成果: Conference contribution › 同行評審

    3 引文 斯高帕斯（Scopus）

  • Novel programmable FER filter based on higher radix recoding for low-power and high-performance applications

    Chen, H. Y. & Jou, S-J., 6 8月 2007, 2007 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '07. 4217999. (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings; 卷 3).

    研究成果: Conference contribution › 同行評審

  • Two-stage scattered pilot synchronization with channel estimation scattered pilots pre-filling for DVB-T/H

    Liu, W. C., Wei, T. C. & Jou, S-J., 28 9月 2007, 2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers. 4239436. (2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers).

    研究成果: Conference contribution › 同行評審

  • 2006

    Memory reduction ICFO estimation architecture for DVB-T

    Wei, T. Z., Jou, S-J. & Shieu, M. T., 1 12月 2006, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings. p. 3406-3409 4 p. 1693357. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）
  • 2005

    4/2 PAM pre-emphasis transmitter with combined driver and mux

    Lin, C. H. & Jou, S. J., 1 1月 2005, 2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005. IEEE Computer Society, p. 189-192 4 p. 4017563. (2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）

  • Adaptive on-die termination resistors for high-speed transceiver

    Lin, C. H., Chen, C. N. & Jou, S-J., 1 12月 2005, 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT). p. 96-99 4 p. 1500028. (2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT); 卷 2005).

    研究成果: Conference contribution › 同行評審

    3 引文 斯高帕斯（Scopus）

  • Multi-gigabit serial link transmitter- Off-chip and on-chip

    Jou, S-J., Lin, C. H., Chen, C. N., Wang, Y. J. & Hsiao, J. Y., 1 12月 2005, Emerging Information Technology Conference 2005. p. 137-140 4 p. 1544368. (Emerging Information Technology Conference 2005; 卷 2005).

    研究成果: Conference contribution › 同行評審

  • 2004

    Low-jitter transmission code for 4-PAM signaling in serial links

    Chen, H. Y., Lin, C. H. & Jou, S-J., 1 12月 2004, Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. p. 334-337 4 p. (Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）

  • Multiplierless multirate decimator / interpolator module generator

    Jou, S-J., Jheng, K. Y., Chen, H. Y. & Wu, A. Y., 1 12月 2004, Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. p. 58-61 4 p. (Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits).

    研究成果: Conference contribution › 同行評審

    2 引文 斯高帕斯（Scopus）
  • 2003

    5 Gbps serial link transmitter with pre-emphasis

    Lin, C. H., Wang, C. H. & Jou, S-J., 1 1月 2003, Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., p. 795-800 6 p. 1195127. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; 卷 2003-January).

    研究成果: Conference contribution › 同行評審

    4 引文 斯高帕斯（Scopus）

  • Hardware nested looping of parameterized and embedded DSP core

    Tsao, Y. L., Chen, W. H., Cheng, W. S., Lin, M. C. & Jou, S-J., 1 1月 2003, Proceedings - IEEE International SOC Conference, SOCC 2003. Ha, D. S., Auletta, R. & Chickanosky, J. (編輯). Institute of Electrical and Electronics Engineers Inc., p. 49-52 4 p. 1241460. (Proceedings - IEEE International SOC Conference, SOCC 2003).

    研究成果: Conference contribution › 同行評審

    4 引文 斯高帕斯（Scopus）

  • Low-power digital CDMA receiver

    Liu, J. S., Chen, I. H., Tai, Y. C. & Jou, S-J., 1 1月 2003, Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., p. 581-582 2 p. 1195088. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; 卷 2003-January).

    研究成果: Conference contribution › 同行評審

  • Module generator of data recovery for serial link receiver

    Jou, S-J., Lin, C. H., Chen, Y. H. & Li, Z. H., 1 1月 2003, Proceedings - IEEE International SOC Conference, SOCC 2003. Ha, D. S., Auletta, R. & Chickanosky, J. (編輯). Institute of Electrical and Electronics Engineers Inc., p. 95-98 4 p. 1241470. (Proceedings - IEEE International SOC Conference, SOCC 2003).

    研究成果: Conference contribution › 同行評審

    4 引文 斯高帕斯（Scopus）
  • 2002

    2.5 Gbps CMOS laser diode driver with APC and digitally controlled current modulation

    Lin, C. H., Yao, I. C., Kuo, C. C. & Jou, S-J., 1 1月 2002, 2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 77-80 4 p. 1031536. (2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）

  • Delay-difference DLL and its-application on skewed output buffer

    Tsao, Y. L., Chung, M. C. & Jou, S-J., 1 1月 2002, 2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 279-282 4 p. 1031586. (2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings).

    研究成果: Conference contribution › 同行評審

    3 引文 斯高帕斯（Scopus）

  • Design of carrier recovery for QAM/VSB dual mode

    Jou, S-J., Lin, H. Y., Shiau, M. T., Heh, J. Y. & Wang, C. K., 1 1月 2002, 2002 International Conference on Communications, Circuits and Systems and West Sino Exposition, ICCCAS 2002 - Proceedings. Li, L. (編輯). Institute of Electrical and Electronics Engineers Inc., p. 1535-1539 5 p. 1179070. (2002 International Conference on Communications, Circuits and Systems and West Sino Exposition, ICCCAS 2002 - Proceedings; 卷 2).

    研究成果: Conference contribution › 同行評審

  • Greeting from technical program chairs

    Lin, T. M., Jou, S-J., Sasaki, K. & Yoon, K., 8月 2002, 2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings. p. III

    研究成果: Conference contribution › 同行評審

  • 2001

    A serial link transceiver for USB2 high-speed mode

    Jou, S-J., Kuo, S. H., Chiu, J. T., King, C., Lee, C. H. & Liu, T., 1 12月 2001, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. p. 72-75 4 p. 922172. (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; 卷 4).

    研究成果: Conference contribution › 同行評審

    4 引文 斯高帕斯（Scopus）

  • Low-power multiplierless FIR filter synthesizer based on CSD code

    Liu, M. C., Chen, C. L., Shin, D. Y., Lin, C. H. & Jou, S-J., 1 12月 2001, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. 卷 626. p. 666-669 4 p. 922325. (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; 卷 4).

    研究成果: Conference contribution › 同行評審

    3 引文 斯高帕斯（Scopus）
  • 1999

    Digitally programmable DC-DC voltage down converter

    Lin, M. C., Lin, H. Y., Chen, C. L. & Jou, S-J., 1 1月 1999, AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs. Institute of Electrical and Electronics Engineers Inc., p. 367-370 4 p. 824109. (AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs).

    研究成果: Conference contribution › 同行評審

  • QAM/VSB dual mode equalizer design and implementation

    Wu, C. F., Shiue, M. T., Huang, C. C. & Jou, S-J., 1 1月 1999, AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs. Institute of Electrical and Electronics Engineers Inc., p. 323-326 4 p. 824094. (AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs).

    研究成果: Conference contribution › 同行評審

    2 引文 斯高帕斯（Scopus）
  • 1996

    Decentralized BIST for 1149.1 and 1149.5 based interconnects

    Su, C-C., Jou, S-J. & Ting, Y. T., 11 3月 1996, Proceedings of the 1996 European Conference on Design and Test, EDTC 1996. Association for Computing Machinery, Inc, p. 120-125 6 p. 494136. (Proceedings of the 1996 European Conference on Design and Test, EDTC 1996).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）
  • 1995

    A Parallel event-driven MOS timing simulator on distributed-memory multiprocessors

    Hsieh, W. H., Jou, S-J. & Su, C-C., 4月 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems. 卷 1. p. 574-577 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution › 同行評審

    1 引文 斯高帕斯（Scopus）