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個人檔案
研究專長
數位積體電路設計,記憶體電路及記憶體系統設計,人工智慧加速電路, 三維電路設計
教育/學術資格
PhD, 電子工程, 國立陽明交通大學
外部位置
指紋
查看啟用 Po-Tsang Huang 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
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過去五年中的合作和熱門研究領域
國家/地區層面的近期外部共同作業。按一下圓點深入探索詳細資料，或
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教育部智慧晶片系統與應用人才培育計畫--111年度智慧晶片系統與應用跨校教學聯盟計畫-模組教材發展計畫-近記憶體運算及記憶體內運算電路設計
1/04/22 → 31/03/23
研究計畫: Ministry of Education(Include School)
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教育部智慧晶片系統與應用人才培育計畫--110年度智慧晶片系統與應用跨校教學聯盟-模組教材發展計畫-近記憶體運算及記憶體內運算電路設計
1/07/21 → 31/03/22
研究計畫: Ministry of Education(Include School)
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Novel Complementary FeFET- based Lookup Table and Routing Switch Design and their Applications in Energy/Area-Efficient FPGA
Huang, Y. Y., Huang, P. T., Lee, P. Y. & Su, P., 2023, 7th IEEE Electron Devices Technology and Manufacturing Conference: Strengthen the Global Semiconductor Research Collaboration After the Covid-19 Pandemic, EDTM 2023. Institute of Electrical and Electronics Engineers Inc., (7th IEEE Electron Devices Technology and Manufacturing Conference: Strengthen the Global Semiconductor Research Collaboration After the Covid-19 Pandemic, EDTM 2023).研究成果: Conference contribution › 同行評審
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On-Interposer Decoupling Capacitors Placement for Interposer-based 3DIC
Chen, P. Y., Liu, C. Y., Chen, H. M. & Huang, P. T., 2023, Proceedings of the 24th International Symposium on Quality Electronic Design, ISQED 2023. IEEE Computer Society, (Proceedings - International Symposium on Quality Electronic Design, ISQED; 卷 2023-April).研究成果: Conference contribution › 同行評審
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Reshaping System Design in 3D Integration: Perspectives and Challenges
Chen, H. M., Ho, C. W., Wu, S. H., Lu, W., Huang, P. T., Chang, H. J. & Liu, C. N. J., 26 3月 2023, ISPD 2023 - Proceedings of the 2023 International Symposium on Physical Design. Association for Computing Machinery, p. 71-77 7 p. (Proceedings of the International Symposium on Physical Design).研究成果: Conference contribution › 同行評審
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Single-Crystal Germanium by Elevated-Laser-Liquid-Phase-Epitaxy (ELLPE) Technique for Monolithic 3D ICs
Chung, H. T., Pan, Y. M., Lin, N. C., Shih, B. J., Yang, C. C., Shen, C. H., Huang, P. T., Cheng, H. C., Chen, K. N. & Hu, C., 2023, (Accepted/In press) 於: Ieee Electron Device Letters. p. 1 1 p.研究成果: Article › 同行評審
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An Embedded Multi-Die Active Bridge (EMAB) Chip for Rapid-Prototype Programmable 2.5D/3D Packaging Technology
Zhang, J., Lu, W., Huang, P. T., Li, S. H., Hung, T. Y., Wu, S. H., Dai, M. J., Chung, I. S., Chen, W. C., Wang, C. H., Sheu, S. S., Chen, H. M., Chen, K. N., Lo, W. C. & Wu, C. I., 2022, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., p. 262-263 2 p. (Digest of Technical Papers - Symposium on VLSI Technology; 卷 2022-June).研究成果: Conference contribution › 同行評審
1 引文 斯高帕斯（Scopus）