每年專案
個人檔案
研究專長
電子設計自動化
系統與晶片設計最佳化
人工智慧晶片設計優化
教育/學術資格
PhD, National Taiwan University
指紋
查看啟用 Mark Po-Hung Lin 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
- 1 類似的個人檔案
網路
國家/地區層面的近期外部共同作業。按一下圓點深入探索詳細資料，或
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-總計畫暨子計畫四：以人工智慧學習類比及混合訊號電路實現設計自動化
1/08/22 → 31/07/23
研究計畫: Other Government Ministry Institute
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教育部智慧晶片系統與應用人才培育計畫--111年度智慧晶片系統與應用跨校教學聯盟計畫-模組教材發展計畫-Handling placement constraints in analog layout synthesis
1/04/22 → 31/03/23
研究計畫: Ministry of Education(Include School)
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-總計畫暨子計畫四：以人工智慧學習類比及混合訊號電路實現設計自動化
1/08/24 → 31/07/25
研究計畫: Other Government Ministry Institute
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Common-Centroid Layout for Active and Passive Devices: A Review and the Road Ahead
Karmokar, N., Madhusudan, M., Sharma, A. K., Harjani, R., Lin, M. P. H. & Sapatnekar, S. S., 2022, ASP-DAC 2022 - 27th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 114-121 8 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; 卷 2022-January).研究成果: Conference contribution › 同行評審
1 引文 斯高帕斯（Scopus） -
On Optimizing Capacitor Array Design for Advanced Node SAR ADC
Chiang, C. Y., Hu, C. L., Chang, K. Y., Lin, P-H., Jou, S. J., Chen, H. Y., Liu, C-N. & Chen, H-M., 2022, Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022. Institute of Electrical and Electronics Engineers Inc., (Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022).研究成果: Conference contribution › 同行評審
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Pole-aware Analog Layout Synthesis Considering Monotonic Current Flows and Wire-Crossings
Patyal, A., Chen, H. M., Lin, P-H., Fang, G. Q. & Chen, S. Y. H., 2022, (Accepted/In press) 於: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. p. 1 1 p.研究成果: Article › 同行評審
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A Novel Machine-Learning based SoC Performance Monitoring Methodology under Wide-Range PVT Variations with Unknown Critical Paths
Wang, D. H., Lin, P. J., Yang, H. T., Hsu, C. A., Huang, S. H. & Lin, P-H., 5 12月 2021, 2021 58th ACM/IEEE Design Automation Conference, DAC 2021. Institute of Electrical and Electronics Engineers Inc., p. 1370-1371 2 p. (Proceedings - Design Automation Conference; 卷 2021-December).研究成果: Conference contribution › 同行評審
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A Novel Technology Mapper for Complex Universal Gates
Wu, M. C., Dao, A. Q. & Lin, P-H., 18 1月 2021, Proceedings of the 26th Asia and South Pacific Design Automation Conference, ASP-DAC 2021. Institute of Electrical and Electronics Engineers Inc., p. 475-480 6 p. 3431561. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).研究成果: Conference contribution › 同行評審
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