趙 家佐

教授

按照存儲在普爾(Pure)的出版物數量及斯高帕斯(Scopus)引文計算。
按照存儲在普爾(Pure)的出版物數量及斯高帕斯(Scopus)引文計算。
按照存儲在普爾(Pure)的出版物數量及斯高帕斯(Scopus)引文計算。
19992024

每年研究成果

篩選
Conference contribution

搜尋結果

  • 2008

    Scan-chain reordering for minimizing scan-shift power based on non-specified test cubes

    Wu, Y. Z. & Chao, C.-T., 2 10月 2008, Proceedings - 26th IEEE VLSI Test Symposium, VTS08. p. 147-154 8 p. 4511712. (Proceedings of the IEEE VLSI Test Symposium).

    研究成果: Conference contribution同行評審

    20 引文 斯高帕斯(Scopus)
  • Testing Methodology of Embedded DRAMs

    Chang, C. M., Chao, C.-T., Huangt, R. F. & Chen, D. Y., 2008, Proceedings - International Test Conference 2008, ITC 2008. 4700618. (Proceedings - International Test Conference).

    研究成果: Conference contribution同行評審

    3 引文 斯高帕斯(Scopus)
  • 2007

    A hybrid scheme for compacting test responses with unknown values

    Chao, C.-T., Cheng, K. T., Wang, S., Chakradhar, S. T. & Wei, W. L., 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design, ICCAD. p. 513-519 7 p. 4397316. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

    研究成果: Conference contribution同行評審

    3 引文 斯高帕斯(Scopus)
  • 2006

    Coverage loss by using space compactors in presence of unknown values

    Chao, C.-T., Wang, S., Chakradhar, S. T., Wei, W. & Cheng, K. T., 2006, Proceedings - Design, Automation and Test in Europe, DATE'06. Institute of Electrical and Electronics Engineers Inc., 1657047. (Proceedings -Design, Automation and Test in Europe, DATE; 卷 1).

    研究成果: Conference contribution同行評審

  • Unknown-tolerance analysis and test-quality control for test response compaction using space compactors

    Chao, C.-T., Cheng, K. T., Wang, S., Chakradhar, S. & Wei, W. L., 2006, 2006 43rd ACM/IEEE Design Automation Conference, DAC'06. Institute of Electrical and Electronics Engineers Inc., p. 1083-1088 6 p. (Proceedings - Design Automation Conference).

    研究成果: Conference contribution同行評審

    3 引文 斯高帕斯(Scopus)
  • 2005

    ChiYun compact: A novel test compaction technique for responses with unknown values

    Chao, C.-T., Wang, S., Chakradhar, S. T. & Cheng, K. T., 2005, Proceedings - 2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005. p. 147-152 6 p. 1524145. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors; 卷 2005).

    研究成果: Conference contribution同行評審

    6 引文 斯高帕斯(Scopus)
  • Response shaper: A novel technique to enhance unknown tolerance for output response compaction

    Chao, C.-T., Wang, S., Chakradhar, S. T. & Cheng, K. T., 2005, Proceedings of theICCAD-2005: International Conference on Computer-Aided Design. p. 80-87 8 p. 1560044. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; 卷 2005).

    研究成果: Conference contribution同行評審

    36 引文 斯高帕斯(Scopus)
  • 2004

    Pattern selection for testing of deep sub-micron timing defects

    Mango, Chao, C.-T., Wang, L. C. & Cheng, K. T., 2004, Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 04. Gielen, G. & Figueras, J. (編輯). p. 1060-1065 6 p. (Proceedings - Design, Automation and Test in Europe Conference and Exhibition; 卷 2).

    研究成果: Conference contribution同行評審

    17 引文 斯高帕斯(Scopus)