跳至主導覽
跳至搜尋
跳過主要內容
國立陽明交通大學研發優勢分析平台 首頁
English
中文
首頁
人員
單位
研究成果
計畫
獎項
活動
貴重儀器
影響
按專業知識、姓名或所屬機構搜尋
查看斯高帕斯 (Scopus) 概要
陳 冠能
教授
電子研究所
智慧半導體奈米系統技術研究中心
https://orcid.org/0000-0003-4316-0007
h-index
h10-index
h5-index
5345
引文
39
h-指數
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
1529
引文
19
h-指數
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
749
引文
15
h-指數
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
2001
2025
每年研究成果
概覽
指紋
網路
計畫
(30)
研究成果
(317)
獎項
(7)
活動
(1)
類似的個人檔案
(6)
指紋
查看啟用 Kuan-Neng Chen 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
排序方式
重量
按字母排序
Keyphrases
3D Heterogeneous Integration
9%
3D IC
52%
3D Integration
90%
Advanced Packaging
20%
Bonding Interface
11%
Bonding Process
25%
Bonding Quality
25%
Bonding Structure
26%
Bonding Technology
37%
Bonding Temperature
21%
Buffer Layer
14%
Chip-level
9%
Copper Wafer
12%
Cu TSV
10%
Cu-Cu Bonding
47%
Cu-Sn
23%
Electrical Characteristics
14%
Electrical Performance
26%
Electrical Reliability
13%
Eutectic Bonding
9%
Fan-out
13%
Fin Field-effect Transistor (FinFET)
11%
Fine pitch
13%
Heterogeneous Integration
34%
Hybrid Bonding
55%
In(III)
12%
Integrated Application
24%
Integration Scheme
22%
Interposer
12%
Low Temperature
72%
Low Thermal Budget
10%
Low-temperature Bonding
16%
Microbump
14%
Microsystems
15%
Neural Sensing
19%
Oxides
10%
Passivation
17%
Passivation Layer
25%
Polyimide
10%
Redistribution Layer
12%
Reliability Test
11%
Temporary Bonding
10%
Thermo-compression Bonding
9%
Thin Buffer
10%
Three-dimensional Integration
35%
Through Silicon via
44%
Ultrathin
20%
Wafer
24%
Wafer Bonding
26%
Wafer Level
44%
Engineering
Bond Strength
6%
Bonded Structure
9%
Bonding Material
7%
Bonding Process
25%
Bonding Strength
12%
Bonding Structure
19%
Bonding Technology
49%
Bonding Temperature
26%
Buffer Layer
10%
Chemical Mechanical Polishing
6%
Copper Wafer
12%
Cu Surface
6%
Dielectrics
18%
Direct Bonding
22%
Electrical Measurement
9%
Electrical Performance
36%
Electroless Plating
6%
Eutectic Bonding
8%
Fits and Tolerances
7%
Flexible Substrate
7%
Integrated Circuit
9%
Integration Platform
7%
Interconnects
44%
Interdiffusion
6%
Interlayer
13%
Intermetallics
8%
Interposer
27%
Joints (Structural Components)
7%
Level Packaging
11%
Low-Temperature
100%
Manufacturability
7%
Metal Layer
7%
Microelectromechanical System
11%
Microsystem
17%
Nodes
7%
Passivation
32%
Passivation Layer
27%
Polymer Material
9%
Process Flow
6%
Reliability Analysis
15%
Reliability Assessment
6%
Room Temperature
7%
Sensing Application
9%
Silicon Dioxide
19%
Silicon Layer
10%
Silicon Substrate
7%
Technology Integration
18%
Thin Films
11%
Three Dimensional Integrated Circuits
37%
Wafer Bonding
37%
