按照存儲在普爾(Pure)的出版物數量及斯高帕斯(Scopus)引文計算。
按照存儲在普爾(Pure)的出版物數量及斯高帕斯(Scopus)引文計算。
按照存儲在普爾(Pure)的出版物數量及斯高帕斯(Scopus)引文計算。
1992 …2024

每年研究成果

篩選
Conference contribution

搜尋結果

  • 2007

    A low latency memory controller for video coding systems

    Chien, C. D., Wang, C. W., Lin, C. C., Hsieh, T. W., Chu, Y. H. & Guo, J.-I., 1 12月 2007, Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007. p. 1211-1214 4 p. 4284874. (Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007).

    研究成果: Conference contribution同行評審

    11 引文 斯高帕斯(Scopus)
  • An embedded coherent-multithreading multimedia processor and its programming model

    Chu, J. C., Ku, W. C., Chou, S. H., Chen, T.-F. & Guo, J.-I., 2007, 2007 44th ACM/IEEE Design Automation Conference, DAC'07. p. 652-657 6 p. 4261265. (Proceedings - Design Automation Conference).

    研究成果: Conference contribution同行評審

    5 引文 斯高帕斯(Scopus)
  • A quality scalable H.264/AVC baseline intra encoder for high definition video applications

    Chang, C. H., Chen, J. W., Chang, H. C., Yang, Y. C., Wang, J. S. & Guo, J.-I., 2007, 2007 IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings. p. 521-526 6 p. 4387602. (IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation).

    研究成果: Conference contribution同行評審

    13 引文 斯高帕斯(Scopus)
  • Low complexity multi-standard video player for portable multimedia applications

    Jian, G. A. & Guo, J.-I., 7月 2007, Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007. IEEE Computer Society, p. 217-224 8 p. 4284569. (Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007).

    研究成果: Conference contribution同行評審

    1 引文 斯高帕斯(Scopus)
  • 2006

    A 160kGate 4.5kB SRAM H.264 video decoder for HDTV applications

    Lin, C. C., Guo, J.-I., Chang, H. C., Yang, Y. C., Chen, J. W., Tsai, M. C. & Wang, J. S., 1 12月 2006, 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. 1696214. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

    研究成果: Conference contribution同行評審

    25 引文 斯高帕斯(Scopus)
  • A condition-based intra prediction algorithm for H.264/AVC

    Chen, J. W., Chang, C. H., Chien-ChangLin, Yang, Y. H. O., Guo, J.-I. & Wang, J. S., 2006, 2006 IEEE International Conference on Multimedia and Expo, ICME 2006 - Proceedings. p. 1077-1080 4 p. 4036790. (2006 IEEE International Conference on Multimedia and Expo, ICME 2006 - Proceedings; 卷 2006).

    研究成果: Conference contribution同行評審

    開啟存取
    13 引文 斯高帕斯(Scopus)
  • A high performance CAVLC encoder design for MPEG-4 AVC/H.264 video coding applications

    Chien, C. D., Lu, K. P., Shih, Y. H. & Guo, J.-I., 2006, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings. p. 3838-3841 4 p. 1693465. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution同行評審

    31 引文 斯高帕斯(Scopus)
  • A high throughput VLSI architecture design for H.264 context-based adaptive binary arithmetic decoding with look ahead parsing

    Yang, Y. C., Lin, C. C., Chang, H. C., Su, C. L. & Guo, J.-I., 2006, 2006 IEEE International Conference on Multimedia and Expo, ICME 2006 - Proceedings. p. 357-360 4 p. 4036610. (2006 IEEE International Conference on Multimedia and Expo, ICME 2006 - Proceedings; 卷 2006).

    研究成果: Conference contribution同行評審

    開啟存取
    16 引文 斯高帕斯(Scopus)
  • A low complexity high quality merger motion estimation architecture design for H.264/AVC

    Su, C. L., Yang, W. S., Chen, Y. L., Yang, Y. C., Chen, C. W., Guo, J.-I. & Tseng, S. Y., 1 12月 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems. p. 398-401 4 p. 4145415. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

    研究成果: Conference contribution同行評審

    7 引文 斯高帕斯(Scopus)
  • A performance-aware IP core design for multi-mode transform coding using scalable-DA algorithm

    Chen, J. W., Chen, K. H., Wang, J. S. & Guo, J.-I., 2006, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings. p. 1904-1907 4 p. 1692982. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution同行評審

    4 引文 斯高帕斯(Scopus)
  • Collaborative multithreading: An open scalable processor architecture for embedded multimedia applications

    Ku, W. C., Chou, S. H., Chu, J. C., Kong, C. H., Chen, T.-F. & Guo, J.-I., 2006, 2006 IEEE International Conference on Multimedia and Expo, ICME 2006 - Proceedings. p. 25-28 4 p. 4036527. (2006 IEEE International Conference on Multimedia and Expo, ICME 2006 - Proceedings; 卷 2006).

    研究成果: Conference contribution同行評審

    開啟存取
    1 引文 斯高帕斯(Scopus)
  • Design of customized functional units for the VLIW-based multi-threading processor core targeted at multimedia applications

    Chu, J. C., Huang, C. W., Chen, H. C., Lu, K. P., Lee, M. S., Guo, J.-I. & Chen, T.-F., 2006, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings. p. 2389-2392 4 p. 1693103. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution同行評審

    2 引文 斯高帕斯(Scopus)
  • Low complexity architecture design of H.264 predictive pixel compensator for HDTV application

    Chen, J. W., Lin, C. C., Guo, J.-I. & Wang, J. S., 2006, 2006 IEEE International Conference on Acoustics, Speech, and Signal Processing - Proceedings. p. III932-III935 1660808. (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings; 卷 3).

    研究成果: Conference contribution同行評審

    21 引文 斯高帕斯(Scopus)
  • Low complexity high quality fractional motion estimation algorithm and architecture design for H.264/AVC

    Su, C. L., Yang, W. S., Chen, Y. L., Li, Y., Chen, C. W., Guo, J.-I. & Tseng, S. Y., 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems. p. 578-581 4 p. 4145459. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

    研究成果: Conference contribution同行評審

    13 引文 斯高帕斯(Scopus)
  • Low-power mechanism with power block management

    Chao, K. C., Chen, K. H., Chu, Y. S. & Guo, J.-I., 2006, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings. p. 2233-2236 4 p. 1693064. (Proceedings - IEEE International Symposium on Circuits and Systems).

    研究成果: Conference contribution同行評審

  • Predictive mode searching policy for H.264/AVC intra prediction

    Lee, M. S., Chu, J. C. & Guo, J.-I., 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems. p. 764-767 4 p. 4145505. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

    研究成果: Conference contribution同行評審

    1 引文 斯高帕斯(Scopus)
  • 2005

    A high-performance low power direct 2-D transform coding IP design for MPEG-4 AVC/H.264 with a switching power suppression technique

    Chen, K. H., Guo, J.-I., Chao, K. C., Wang, J. S. & Chu, Y. S., 2005, 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT). p. 291-294 4 p. 1500078. (2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT); 卷 2005).

    研究成果: Conference contribution同行評審

    12 引文 斯高帕斯(Scopus)
  • Design exploration of a Spurious Power Suppression Technique (SPST) and its applications

    Chen, K. H., Chao, K. C., Wang, J. S., Chu, Y. S. & Guo, J.-I., 1 11月 2005, 2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005. IEEE Computer Society, p. 341-344 4 p. 4017601. (2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005).

    研究成果: Conference contribution同行評審

    4 引文 斯高帕斯(Scopus)
  • 2004

    A high-performance MPEG4 bitstream processing core

    Chang, T. L., Tsai, Y. M., Chien, C. D., Lin, C. C. & Guo, J.-I., 1 12月 2004, 2004 IEEE International Conference on Multimedia and Expo (ICME). p. 467-470 4 p. (2004 IEEE International Conference on Multimedia and Expo (ICME); 卷 1).

    研究成果: Conference contribution同行評審

    3 引文 斯高帕斯(Scopus)
  • A power-aware SNR-progressive DCT/IDCT IP core design for multimedia transform coding

    Chen, K. H., Guo, J.-I., Wang, J. S. & Yeh, C. W., 1 12月 2004, 2004 IEEE International Conference on Multimedia and Expo (ICME). p. 1683-1686 4 p. (2004 IEEE International Conference on Multimedia and Expo (ICME); 卷 3).

    研究成果: Conference contribution同行評審

    1 引文 斯高帕斯(Scopus)
  • 2002

    Design of a new cryptography system

    Chen, H. C., Yen, J. C. & Guo, J.-I., 2002, Advances in Multimedia Information Processing - PCM 2002 - 3rd IEEE Pacific Rim Conference on Multimedia, Proceedings. Chen, Y.-C., Chang, L.-W. & Hsu, C.-T. (編輯). Springer Verlag, p. 1041-1048 8 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 卷 2532).

    研究成果: Conference contribution同行評審

    14 引文 斯高帕斯(Scopus)
  • 2001

    A low cost 2-D inverse discrete cosine transform design for image compression

    Guo, J.-I., 6 5月 2001, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. 卷 626. p. 658-661 4 p. 922323. (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; 卷 4).

    研究成果: Conference contribution同行評審

    1 引文 斯高帕斯(Scopus)
  • A new DA-based array for one dimensional discrete Hartley transform

    Guo, J.-I., 1 12月 2001, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. p. 662-665 4 p. 922324. (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; 卷 4).

    研究成果: Conference contribution同行評審

    5 引文 斯高帕斯(Scopus)
  • 1993

    A two-level pipelined systolic array chip for computing the discrete cosine transform

    Guo, J.-I., Liu, C. M. & Jen, C. W., 1 1月 1993, 1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993 - Proceedings of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 199-203 5 p. 263606. (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).

    研究成果: Conference contribution同行評審

  • Cordic-based VLSI array for computing 2-D discrete Hartley transform

    Guo, J.-I., Liu, C. M. & Jen, C. W., 1 1月 1993, Proceedings - IEEE International Symposium on Circuits and Systems. Publ by IEEE, p. 1571-1574 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems; 卷 3).

    研究成果: Conference contribution同行評審

    3 引文 斯高帕斯(Scopus)
  • Multi-phase shared bus structure for the fast Fourier transform

    Lin, Y. S., Guo, J.-I., Shung, C. B. & Jen, C. W., 1 1月 1993, Proceedings - IEEE International Symposium on Circuits and Systems. Publ by IEEE, p. 1575-1578 4 p. (Proceedings - IEEE International Symposium on Circuits and Systems; 卷 3).

    研究成果: Conference contribution同行評審

  • 1992

    A memory-based approach to design and implement systolic arrays for DFT and DCT

    Guo, J.-I., Liu, C. M. & Jen, C. W., 1 1月 1992, ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing. Institute of Electrical and Electronics Engineers Inc., p. 621-624 4 p. 226543. (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings; 卷 5).

    研究成果: Conference contribution同行評審

    5 引文 斯高帕斯(Scopus)