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查看斯高帕斯 (Scopus) 概要
温 宏斌
教授
電機工程學系
開源智能聯網研究中心
https://orcid.org/0000-0003-4623-9941
h-index
h10-index
h5-index
750
引文
14
h-指數
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
446
引文
9
h-指數
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
153
引文
5
h-指數
按照存儲在普爾（Pure）的出版物數量及斯高帕斯（Scopus）引文計算。
2001
2024
每年研究成果
概覽
指紋
網路
計畫
(32)
研究成果
(105)
獎項
(7)
類似的個人檔案
(6)
指紋
查看啟用 Hung-Pin Wen 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
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重量
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Keyphrases
Soft Error Rate
67%
Soft Error
51%
Timing Analysis
43%
Error Rate Analysis
42%
Simulation-based
40%
Test Case Generation
37%
CMOS Design
33%
Service Chain
33%
Multicore Processors
32%
Software-defined Networking
31%
Process Variation
29%
Benchmark Circuits
28%
Data Center Networks
27%
Transient Fault
23%
Cloud Data Center
23%
Task Scheduler
23%
Programmable Switches
20%
Network Function Virtualization
20%
Flip-flop
18%
Boolean
18%
D Flip-flop
18%
Voltage Assignment
18%
Scaled CMOS
17%
Functional Test
17%
Static Timing Analysis
17%
Latch Design
17%
Test Pattern
16%
Flow Migration
16%
Monte Carlo
16%
Task Scheduling
15%
Delay Adjustable
15%
Dynamic Voltage
14%
Full-chip
14%
Support Vector Machine
14%
Design Process
14%
Latency
14%
Connected Autonomous Vehicles
13%
Radiation Hardening
13%
VLSI Design
13%
Deep Submicron
13%
Variation-aware
13%
Quality of Service
13%
High Performance
12%
45 Nm CMOS Technology
12%
OpenFlow
12%
Load Balancing
12%
Machine Learning
12%
Byzantine Empire
12%
Design Functionality
12%
Error Rate Estimation
12%
Computer Science
Experimental Result
100%
Soft Error
84%
Timing Analysis
53%
Benchmark Circuit
35%
Process Variation
33%
Multicore Processor
32%
Functional Test
29%
Software-Defined Networking
29%
Test Generation
26%
Software-Defined Network
20%
Data Mining
18%
Machine Learning
18%
Networking Function
17%
Analysis Framework
16%
Cloud Computing
16%
task-scheduling
15%
Dynamic Voltage
15%
Network Function Virtualization
14%
Support Vector Machine
13%
Fault Simulation
13%
Service-Level Agreement
12%
Quality of Service
12%
OpenFlow
12%
Transient Fault
11%
Service Function
11%
Control Plane
11%
Equivalence Checking
11%
Classification Accuracy
10%
Embedded Processor
10%
Physical Information
10%
Wildcard
10%
Test Methodology
10%
Function Chain
10%
Internet of Things
10%
Autonomous Vehicles
10%
Functional Verification
10%
Routing Algorithm
9%
Fault Coverage
9%
Parallelism
8%
Characteristic Function
8%
Virtual Machine
8%
Network Service
8%
Leakage Current
7%
Learning Framework
7%
Software Defined Networking
7%
Data Structure
7%
Data Center
7%
Datapath
7%
Load Balancing
7%
decision diagram
6%
Engineering
Soft Error
83%
Experimental Result
59%
Error Rate
52%
Process Variation
31%
Flip Flop Circuits
28%
Defects
28%
Rate Analysis
26%
Functional Test
24%
Transients
21%
Tasks
20%
Microprocessor Chips
19%
Design Flow
15%
Support Vector Machine
13%
Process Parameter
11%
Nodes
11%
Illustrates
11%
Classification Accuracy
10%
Embedded Processor
10%
Level Function
10%
Critical Path
10%
Design Rule
10%
Software-Defined Network
10%
Energy Engineering
10%
Level Unit
10%
Learning Algorithm
10%
Integrated Circuit Design
10%
Test Method
9%
Cell Model
8%
Process Design
8%
Limitations
8%
Silicon Technology
7%
Design Verification
7%
Cloud Computing
7%
Induced Defect
7%
Metrics
7%
Voltage Scaling
6%
Design Process
6%
SPICE
6%
VLSI Circuits
6%
Learning Scheme
6%
Controllability
6%
Nanoscale
5%
Control Plane
5%
Single Event Upset
5%
Area Overhead
5%
Test Framework
5%
Testability
5%
Simplification of Design
5%
Engineering
5%
Circuit Design
5%
