每年專案
個人檔案
研究專長
類比與混合信號積體電路設計、電源管理積體電路設計、生醫積體電路設計
經歷
1995/7~1995/10 美國Cirrus Logic 類比電路設計工程師
1995/11~1996/7 芬蘭赫爾辛基理工大學 客座研究員
1997/5~1998/8 美國S3 Incorporated 資深主任工程師
1998/8 ~ 1999/10 美國Prominent Communications ASIC Group 主管工程師
1999/1~2001/1 美國Panstera類比電路設計經理
2001/2~2002/6 美國Pixelworks類比電路設計 總監
2002/7~2003/7 美國Qualmaker類比電路設計 總監
2003/8~ 國立交通大學電機工程學系 教授
教育/學術資格
PhD, 電機工程, Ohio State University
外部位置
指紋
- 1 類似的個人檔案
過去五年中的合作和熱門研究領域
專案
- 17 已完成
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教育部智慧晶片系統與應用人才培育計畫--智慧晶片系統與應用跨校教學聯盟計畫-模組教材發展計畫-低功耗線性及切換式穩壓器設計
Hung, C.-C. (PI)
1/04/22 → 31/03/23
研究計畫: Ministry of Education(Include School)
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教育部110年度智慧晶片系統與應用人才培育計畫--智慧健康晶片系統與應用聯盟-模組教材發展計畫-低功耗線性及切換式穩壓器設計
Hung, C.-C. (PI)
1/07/21 → 31/03/22
研究計畫: Ministry of Education(Include School)
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無線式可擴增之神經感測與刺激微系統技術平台開發 - 前端神經感測電路與醫用頻段無線功率暨資料傳輸電路設計
Hung, C.-C. (PI)
1/08/20 → 31/07/21
研究計畫: Other Government Ministry Institute
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新型置於耳蝸外人工電子耳之系統晶片技術平台設計與應用-子計畫三:新型置於耳蝸外人工電子耳之系統晶片技術平台設計與應用之低功率音頻混合信號電路設計
Hung, C.-C. (PI)
1/08/18 → 31/07/19
研究計畫: Other Government Ministry Institute
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Design of a 3rd-Order 12-bit Incremental ADC for Power Monitoring Applications
Lai, C. M. & Hung, C. C., 2024, APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding. Institute of Electrical and Electronics Engineers Inc., p. 740-743 4 p. (APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding).研究成果: Conference contribution › 同行評審
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Design of CMOS Analog Front-End Local-Field Potential Chopper Amplifier With Stimulation Artifact Tolerance for Real-Time Closed-Loop Deep Brain Stimulation SoC Applications
Wu, C. Y., Huang, C. W., Chen, Y. W., Lai, C. K., Hung, C. C. & Ker, M. D., 1 6月 2024, 於: IEEE Transactions on Biomedical Circuits and Systems. 18, 3, p. 539-551 13 p.研究成果: Article › 同行評審
4 引文 斯高帕斯(Scopus) -
Design of ECoG Analog Front End for Temporal Interference Stimulation Experiment
Lai, C. M. & Hung, C. C., 2024, 2024 31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024. Institute of Electrical and Electronics Engineers Inc., (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).研究成果: Conference contribution › 同行評審
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Guest Editorial: Special Issue on Selected Articles From IEEE BioCAS 2023
Hung, C. C., Atef, M. & Chen, V., 2024, 於: IEEE Transactions on Biomedical Circuits and Systems. 18, 4, p. 718-719 2 p.研究成果: Review article › 同行評審
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A CMOS Synchronized Sample-and-Hold Artifact Blanking Analog Front-End Local Field Potential Acquisition Unit with ±3.6-V Stimulation Artifact Tolerance and Monopolar Electrode-Tissue Impedance Measurement Circuit for Closed-Loop Deep Brain Stimulation SoCs
Huang, C. W., Lai, C. K., Hung, C. C., Wu, C.-Y. & Ker, M. D., 1 6月 2023, 於: IEEE Transactions on Circuits and Systems I: Regular Papers. 70, 6, p. 2257-2270 14 p.研究成果: Article › 同行評審
12 引文 斯高帕斯(Scopus)
獎項
活動
- 1 Editorial work
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING (事件)
Hung, C.-C. (Editor in chief)
1 1月 2013 → 31 12月 2018活動: Editorial work