每年專案
個人檔案
研究專長
奈米電子元件、半導體製程技術、鐵電元件、二維材料
教育/學術資格
PhD, 電子, National Chiao Tung University
指紋
查看啟用 Chun-Jung Su 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
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過去五年中的合作和熱門研究領域
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臺日(JP)雙邊協議型擴充加值(add-on) 國際合作研究計畫－奈米級鐵電電晶體之研究開發及其在機器學習加速器之應用
Su, C.-J. (PI)
1/04/22 → 31/03/23
研究計畫: Other Government Ministry Institute
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臺日(JP)雙邊協議型擴充加值(add-on) 國際合作研究計畫－奈米級鐵電電晶體之研究開發及其在機器學習加速器之應用
Su, C.-J. (PI)
1/04/21 → 31/03/22
研究計畫: Other Government Ministry Institute
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A Novel Metal-Bridging Free Lift-Off Process for Fabricating High-Performance Sub-100-nm Gate Length MoS2 Transistors
Chang, Y. C., Su, Y. C., Hu, H. C., Tsai, J. C., Shih, C. Y., Su, C. J., Li, P. W., Chang, W. H. & Lin, H. C., 2025, 於: IEEE Transactions on Electron Devices. 72, 4, p. 2032-2037 6 p.研究成果: Article › 同行評審
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Comprehensive Analysis of Pulse Voltage Stress Effects on Electrical Degradation in Junctionless Ferroelectric Thin-Film Transistors
Ma, W. C. Y., Su, C. J., Kao, K. H., Cho, T. C., Yen, Y. C., Yang, J. M., Li, Y. H., Chen, Y. C., Lin, J. Y. & Chang, H. W., 2025, 於: IEEE Transactions on Electron Devices. 72, 9, p. 4865-4871 7 p.研究成果: Article › 同行評審
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Enabling Broader Memory Windows by Double-Gate Nanosheet Ferroelectric FETs for Next-Generation Non-Volatile Memory Storage
Wu, F., Chiu, C. Y., Lin, T. Y., Wu, C. H., Hu, V. P. H., Su, P. & Su, C. J., 2025, 9th IEEE Electron Devices Technology and Manufacturing Conference: Shaping the Future with Innovations in Devices and Manufacturing, EDTM 2025. Institute of Electrical and Electronics Engineers Inc., (9th IEEE Electron Devices Technology and Manufacturing Conference: Shaping the Future with Innovations in Devices and Manufacturing, EDTM 2025).研究成果: Conference contribution › 同行評審
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Enhancing Analog Performance in Ferroelectric Synapses via Independent Double-Gate Nanosheet FeFETs
Wu, F., Chiu, C. Y., Wu, C. H., Hu, V. P. H., Su, P. & Su, C. J., 2025, 2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers. Institute of Electrical and Electronics Engineers Inc., (2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers).研究成果: Conference contribution › 同行評審
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High-Performance Junctionless Ferroelectric Thin-Film Transistor for Low-Voltage and High-Speed Nonvolatile Memory Applications
Ma, W. C. Y., Su, C. J., Kao, K. H., Yen, Y. C., Yang, J. M., Li, Y. H., Chen, Y. C., Lin, J. Y. & Chang, H. W., 2025, 於: IEEE Transactions on Electron Devices. 72, 1, p. 247-252 6 p.研究成果: Article › 同行評審
1 引文 斯高帕斯（Scopus）