每年研究成果
每年研究成果
- 5結果
搜尋結果
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2007
Latency-tolerant virtual cluster architecture for VLIW DSP
Hsiao, P. C., Lin, T. J., Liu, C.-W. & Jen, C. W., 2007, 於: Proceedings - IEEE International Symposium on Circuits and Systems. p. 3506-3509 4 p., 4253436.研究成果: Conference article › 同行評審
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Rapid C to FPGA prototyping with multithreaded emulation engine
Chen, S. K., Wang, B. S., Lin, T. J. & Liu, C.-W., 27 9月 2007, 於: Proceedings - IEEE International Symposium on Circuits and Systems. p. 409-412 4 p., 4252658.研究成果: Conference article › 同行評審
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2005
Hierarchical instruction encoding for VLIW digital signal processors
Liu, C. H., Lin, T. J., Chao, C. M., Hsiao, P. C., Lin, L. C., Chen, S. K., Huang, C. W., Liu, C.-W. & Jen, C. W., 2005, 於: Proceedings - IEEE International Symposium on Circuits and Systems. p. 3503-3506 4 p., 1465384.研究成果: Conference article › 同行評審
5 引文 斯高帕斯（Scopus） -
Pipelining technique for energy-aware datapaths
Huang, W. S., Lin, T. J., Ou, S. H., Liu, C.-W. & Jen, C. W., 2005, 於: Proceedings - IEEE International Symposium on Circuits and Systems. p. 1218-1221 4 p., 1464813.研究成果: Conference article › 同行評審
2 引文 斯高帕斯（Scopus） -
2004
Static floating-point unit with implicit exponent tracking for embedded DSP
Lin, H. Y., Lin, T. J., Chao, C. M., Liao, Y. C., Liu, C.-W. & Jen, C. W., 2004, 於: Proceedings - IEEE International Symposium on Circuits and Systems. 2, p. II821-II824研究成果: Conference article › 同行評審
4 引文 斯高帕斯（Scopus）