每年專案
個人檔案
研究專長
電子設計自動化、類比設計輔助技術、混合信號系統驗證
經歷
2001.08-2018.07 國立中央大學電機工程系 教授
2017.08-2018.07 國立中央大學副教務長
2018.08-迄今 國立交通大學電子工程學系/電子研究所教授
教育/學術資格
PhD, 電子, 國立陽明交通大學
外部位置
指紋
查看啟用 Chien-Nan Jimmy Liu 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
- 1 類似的個人檔案
過去五年中的合作和熱門研究領域
國家/地區層面的近期外部共同作業。按一下圓點深入探索詳細資料，或
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫二：加入機器學習及佈局遷移技術的風格導向類比佈局自動化技術
Liu, C.-N. J. (PI)
1/08/24 → 31/07/25
研究計畫: Other Government Ministry Institute
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫二：加入機器學習及佈局遷移技術的風格導向類比佈局自動化技術
Liu, C.-N. J. (PI)
1/08/23 → 31/07/24
研究計畫: Other Government Ministry Institute
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫二：加入機器學習及佈局遷移技術的風格導向類比佈局自動化技術
Liu, C.-N. J. (PI)
1/08/22 → 31/07/23
研究計畫: Other Government Ministry Institute
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111年度智慧晶片系統與應用跨校教學聯盟計畫-模組教材發展計畫「智慧終端裝置晶片系統與應用聯盟：數位系統的高階合成設計方法」
Liu, C.-N. J. (PI)
1/04/22 → 31/03/23
研究計畫: Ministry of Education(Include School)
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人工智慧在前瞻電子設計自動化技術的應用(II)-總計畫暨子計畫二：以人工智慧協助異質整合系統的設計自動化與驗證技術(II)
Liu, C.-N. J. (PI)
1/08/21 → 31/07/22
研究計畫: Other Government Ministry Institute
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Accurate Estimation of Buffered Interconnect Delay Based on Virtual Buffering and Multi-Level Cluster Tree Techniques
Chen, C. H., Liu, C. N. J., Tu, W. T., Chen, T. C. & Jiang, I. H. R., 2024, APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding. Institute of Electrical and Electronics Engineers Inc., p. 221-225 5 p. (APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding).研究成果: Conference contribution › 同行評審
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Efficient Analog Layout Generation for In-RRAM Computing Circuits via Area and Wire Optimization
Li, B. H., Lin, K. C., Zuo, H., Pan, P. C., Chen, H. M., Jou, S. J., Liu, C. N. J. & Lai, B. C., 2024, 2024 IEEE 67th International Midwest Symposium on Circuits and Systems, MWSCAS 2024. Institute of Electrical and Electronics Engineers Inc., p. 1085-1090 6 p. (Midwest Symposium on Circuits and Systems).研究成果: Conference contribution › 同行評審
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Mitigating Power and Process Variation for Analog CIM Design Migration
Chang, S. H., Chen, S. Y., Yang, C. W., Huang, H. W., Yang, Y. C., Chen, W. L., Liu, C. N. & Chen, H. M., 2024, Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024. Institute of Electrical and Electronics Engineers Inc., (Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024).研究成果: Conference contribution › 同行評審
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ML/DL-Based Signal Integrity Optimization for InFO Routing
Kang, B. K., Chang, H. J., Chen, H. M. & Liu, C. N. J., 2024, 2024 22nd IEEE Interregional NEWCAS Conference, NEWCAS 2024. Institute of Electrical and Electronics Engineers Inc., p. 343-347 5 p. (2024 22nd IEEE Interregional NEWCAS Conference, NEWCAS 2024).研究成果: Conference contribution › 同行評審
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On DRC Cleanness of Cell Porting for Design Migrations in Foundries and Technologies
Wang, C. Y., Chen, C. H., Chang, P. H., Hsieh, C. Y., Su, C. F., Ji, S., Liu, C. N. J. & Chen, H. M., 2024, 2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings).研究成果: Conference contribution › 同行評審