Wide Vfband Vthtunability for metal-gated mos devices with HfLaO gate dielectrics

X. P. Wang; H. Y. Yu; M. F. Li; C. X. Zhu; S. Biesemans; Albert Chin; Y. Y. Sun; Y. P. Feng; Andy Lim; Yee Chia Yeo; Wei Yip Loh; G. Q. Lo; Dim Lee Kwong

doi:10.1142/9781848164079_0006

Wide V_fband V_thtunability for metal-gated mos devices with HfLaO gate dielectrics

X. P. Wang, H. Y. Yu, M. F. Li, C. X. Zhu, S. Biesemans, Albert Chin, Y. Y. Sun, Y. P. Feng, Andy Lim, Yee Chia Yeo, Wei Yip Loh, G. Q. Lo, Dim Lee Kwong

Research output: Chapter in Book/Report/Conference proceeding › Chapter › peer-review

Abstract

For the first time, we demonstrate experimentally that by using HfLaO high-K gate dielectric, the flat-band voltage (V_fb) and the threshold voltage (V_th) of metal-electrode-gated MOS devices can be tuned effectively in a wide range (wider than that from the Si-conduction band edge to the Si-valence band edge) after a 1000-°C annealing required by a conventional CMOS source/drain activation process. As prototype examples shown in this letter, TaN gate with effective work function Φ_{m, eff}~ 3.9-4.2 eV and Pt gate with Φ_{m, eff}~ 5.5 eV are re- ported. A specific model based on the interfacial dipole between the metal gate and the HfLaO is proposed to interpret the results. This provides an additionally practical guideline for choosing the appropriate gate stacks and dielectric to meet the requirements of future CMOS devices.

Original language	English
Title of host publication	Selected Semiconductor Research
Publisher	Imperial College Press
Pages	374-376
Number of pages	3
ISBN (Electronic)	9781848164079
ISBN (Print)	9781848164062
DOIs	https://doi.org/10.1142/9781848164079_0006
State	Published - 1 Jan 2011

Keywords

Fermi-level pinning
HfLaO
High-K (HK) dielectric
Interfacial dipole
Metal gate (MG)
Work function

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10.1142/9781848164079_0006

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title = "Wide Vfband Vthtunability for metal-gated mos devices with HfLaO gate dielectrics",

abstract = "For the first time, we demonstrate experimentally that by using HfLaO high-K gate dielectric, the flat-band voltage (Vfb) and the threshold voltage (Vth) of metal-electrode-gated MOS devices can be tuned effectively in a wide range (wider than that from the Si-conduction band edge to the Si-valence band edge) after a 1000-°C annealing required by a conventional CMOS source/drain activation process. As prototype examples shown in this letter, TaN gate with effective work function Φm, eff~ 3.9-4.2 eV and Pt gate with Φm, eff~ 5.5 eV are re- ported. A specific model based on the interfacial dipole between the metal gate and the HfLaO is proposed to interpret the results. This provides an additionally practical guideline for choosing the appropriate gate stacks and dielectric to meet the requirements of future CMOS devices.",

keywords = "Fermi-level pinning, HfLaO, High-K (HK) dielectric, Interfacial dipole, Metal gate (MG), Work function",

author = "Wang, {X. P.} and Yu, {H. Y.} and Li, {M. F.} and Zhu, {C. X.} and S. Biesemans and Albert Chin and Sun, {Y. Y.} and Feng, {Y. P.} and Andy Lim and Yeo, {Yee Chia} and Loh, {Wei Yip} and Lo, {G. Q.} and Kwong, {Dim Lee}",

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doi = "10.1142/9781848164079_0006",

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T1 - Wide Vfband Vthtunability for metal-gated mos devices with HfLaO gate dielectrics

AU - Wang, X. P.

AU - Yu, H. Y.

AU - Li, M. F.

AU - Zhu, C. X.

AU - Biesemans, S.

AU - Chin, Albert

AU - Sun, Y. Y.

AU - Feng, Y. P.

AU - Lim, Andy

AU - Yeo, Yee Chia

AU - Loh, Wei Yip

AU - Lo, G. Q.

AU - Kwong, Dim Lee

PY - 2011/1/1

Y1 - 2011/1/1

N2 - For the first time, we demonstrate experimentally that by using HfLaO high-K gate dielectric, the flat-band voltage (Vfb) and the threshold voltage (Vth) of metal-electrode-gated MOS devices can be tuned effectively in a wide range (wider than that from the Si-conduction band edge to the Si-valence band edge) after a 1000-°C annealing required by a conventional CMOS source/drain activation process. As prototype examples shown in this letter, TaN gate with effective work function Φm, eff~ 3.9-4.2 eV and Pt gate with Φm, eff~ 5.5 eV are re- ported. A specific model based on the interfacial dipole between the metal gate and the HfLaO is proposed to interpret the results. This provides an additionally practical guideline for choosing the appropriate gate stacks and dielectric to meet the requirements of future CMOS devices.

AB - For the first time, we demonstrate experimentally that by using HfLaO high-K gate dielectric, the flat-band voltage (Vfb) and the threshold voltage (Vth) of metal-electrode-gated MOS devices can be tuned effectively in a wide range (wider than that from the Si-conduction band edge to the Si-valence band edge) after a 1000-°C annealing required by a conventional CMOS source/drain activation process. As prototype examples shown in this letter, TaN gate with effective work function Φm, eff~ 3.9-4.2 eV and Pt gate with Φm, eff~ 5.5 eV are re- ported. A specific model based on the interfacial dipole between the metal gate and the HfLaO is proposed to interpret the results. This provides an additionally practical guideline for choosing the appropriate gate stacks and dielectric to meet the requirements of future CMOS devices.

KW - Fermi-level pinning

KW - HfLaO

KW - High-K (HK) dielectric

KW - Interfacial dipole

KW - Metal gate (MG)

KW - Work function

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DO - 10.1142/9781848164079_0006

M3 - Chapter

AN - SCOPUS:84967693166

SN - 9781848164062

SP - 374

EP - 376

BT - Selected Semiconductor Research

PB - Imperial College Press

ER -

Wide V_fband V_thtunability for metal-gated mos devices with HfLaO gate dielectrics

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Keywords

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