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Wafer-level 3D integration technology
Steven J. Koester
*
, Albert M. Young
, Roy R. Yu
, Sampath Purushothaman
,
Kuan-Neng Chen
, Douglas C. La Tulipe
, Narender Rana
, Leathen Shi
, Matthew R. Wordeman
, Edmund J. Sprogis
*
Corresponding author for this work
Research output
:
Contribution to journal
›
Review article
›
peer-review
170
Scopus citations
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Keyphrases
Wafer Level
100%
Three-dimensional Integration
100%
Technology Integration
100%
Integration Scheme
50%
Process Technology
25%
3D IC
25%
Process Variation
25%
Process Integration
25%
Wafer Bonding
25%
Production Environment
25%
Technology Elements
25%
Engineering
Technology Integration
100%
Three Dimensional Integrated Circuits
50%
Process Integration
50%
Production Environment
50%
Process Variation
50%
Computer Science
Integration Technology
100%
Process Variation
50%
Process Integration
50%
Production Environment
50%
Integrated Circuit
50%