VLSI processor design of real-time data compression for high-resolution imaging radar

Wai-Chi  Fang

doi:10.1109/ASIC.1994.404524

VLSI processor design of real-time data compression for high-resolution imaging radar

Wai-Chi Fang^*

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to journal › Conference article › peer-review

2 Scopus citations

Abstract

For the high-resolution imaging radar systems, real-time data compression of raw imaging data is required to accomplish the science requirements and satisfy the given communication and storage constraints. The Block Adaptive Quantizer (BAQ) algorithm and its associated VLSI processor design have been developed to provide a real-time data compressor for high-resolution imaging radar systems.

Original language	English
Pages (from-to)	441-444
Number of pages	4
Journal	Proceedings of the Annual IEEE International ASIC Conference and Exhibit
DOIs	https://doi.org/10.1109/ASIC.1994.404524
State	Published - 1994
Event	Proceedings of the 7th IEEE International ASIC Conference and Exhibit - Rochester, NY, USA Duration: 19 Sep 1994 → 23 Sep 1994

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title = "VLSI processor design of real-time data compression for high-resolution imaging radar",

abstract = "For the high-resolution imaging radar systems, real-time data compression of raw imaging data is required to accomplish the science requirements and satisfy the given communication and storage constraints. The Block Adaptive Quantizer (BAQ) algorithm and its associated VLSI processor design have been developed to provide a real-time data compressor for high-resolution imaging radar systems.",

author = "Wai-Chi Fang",

year = "1994",

doi = "10.1109/ASIC.1994.404524",

language = "English",

pages = "441--444",

journal = "Proceedings of the Annual IEEE International ASIC Conference and Exhibit",

issn = "1063-0988",

note = "Proceedings of the 7th IEEE International ASIC Conference and Exhibit ; Conference date: 19-09-1994 Through 23-09-1994",

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AU - Fang, Wai-Chi

PY - 1994

Y1 - 1994

N2 - For the high-resolution imaging radar systems, real-time data compression of raw imaging data is required to accomplish the science requirements and satisfy the given communication and storage constraints. The Block Adaptive Quantizer (BAQ) algorithm and its associated VLSI processor design have been developed to provide a real-time data compressor for high-resolution imaging radar systems.

AB - For the high-resolution imaging radar systems, real-time data compression of raw imaging data is required to accomplish the science requirements and satisfy the given communication and storage constraints. The Block Adaptive Quantizer (BAQ) algorithm and its associated VLSI processor design have been developed to provide a real-time data compressor for high-resolution imaging radar systems.

UR - http://www.scopus.com/inward/record.url?scp=0028709991&partnerID=8YFLogxK

U2 - 10.1109/ASIC.1994.404524

DO - 10.1109/ASIC.1994.404524

M3 - Conference article

AN - SCOPUS:0028709991

SN - 1063-0988

SP - 441

EP - 444

JO - Proceedings of the Annual IEEE International ASIC Conference and Exhibit

JF - Proceedings of the Annual IEEE International ASIC Conference and Exhibit

T2 - Proceedings of the 7th IEEE International ASIC Conference and Exhibit

Y2 - 19 September 1994 through 23 September 1994

ER -

VLSI processor design of real-time data compression for high-resolution imaging radar

Abstract

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