Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips

Juinn-Dar Huang; Chia Hung Liu; Wei Hao Yang

doi:10.1109/VLSI-SoC.2018.8644984

Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips

Juinn-Dar Huang, Chia Hung Liu, Wei Hao Yang

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Digital microfluidic biochip (DMFB) is a tiny device that can carry out a rich set of bioassays without the need of bulky equipment. However, designing a good general-purpose DMFB architecture is still considered a big challenge today. NP-hard synthesis problems make on-line synthesis virtually impossible on exiting array-based architectures. In this paper, we first elaborate on the major concerns in a DMFB design flow, from the aspects of both synthesis and physical design. We then propose a versatile ring-based architecture VERBA and its corresponding fast one-pass synthesis flow. Experimental results show that VERBA incorporated with the proposed synthesis flow is a better solution than existing architectures and synthesis algorithms especially for real-time cyber-physical systems.

Original language	English
Title of host publication	Proceedings of the 2018 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018
Publisher	IEEE Computer Society
Pages	13-18
Number of pages	6
ISBN (Electronic)	9781538647561
DOIs	https://doi.org/10.1109/VLSI-SoC.2018.8644984
State	Published - 2 Jul 2018
Event	26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018 - Verona, Italy Duration: 8 Oct 2018 → 10 Oct 2018

Publication series

Name	IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
Volume	2018-October
ISSN (Print)	2324-8432
ISSN (Electronic)	2324-8440

Conference

Conference	26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018
Country/Territory	Italy
City	Verona
Period	8/10/18 → 10/10/18

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10.1109/VLSI-SoC.2018.8644984

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Huang, J.-D., Liu, C. H., & Yang, W. H. (2018). Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips. In Proceedings of the 2018 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018 (pp. 13-18). Article 8644984 (IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC; Vol. 2018-October). IEEE Computer Society. https://doi.org/10.1109/VLSI-SoC.2018.8644984

Huang, Juinn-Dar ; Liu, Chia Hung ; Yang, Wei Hao. / Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips. Proceedings of the 2018 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018. IEEE Computer Society, 2018. pp. 13-18 (IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC).

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title = "Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips",

abstract = "Digital microfluidic biochip (DMFB) is a tiny device that can carry out a rich set of bioassays without the need of bulky equipment. However, designing a good general-purpose DMFB architecture is still considered a big challenge today. NP-hard synthesis problems make on-line synthesis virtually impossible on exiting array-based architectures. In this paper, we first elaborate on the major concerns in a DMFB design flow, from the aspects of both synthesis and physical design. We then propose a versatile ring-based architecture VERBA and its corresponding fast one-pass synthesis flow. Experimental results show that VERBA incorporated with the proposed synthesis flow is a better solution than existing architectures and synthesis algorithms especially for real-time cyber-physical systems.",

author = "Juinn-Dar Huang and Liu, {Chia Hung} and Yang, {Wei Hao}",

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Huang, J-D, Liu, CH & Yang, WH 2018, Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips. in Proceedings of the 2018 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018., 8644984, IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC, vol. 2018-October, IEEE Computer Society, pp. 13-18, 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, 8/10/18. https://doi.org/10.1109/VLSI-SoC.2018.8644984

Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips. / Huang, Juinn-Dar; Liu, Chia Hung; Yang, Wei Hao.
Proceedings of the 2018 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018. IEEE Computer Society, 2018. p. 13-18 8644984 (IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC; Vol. 2018-October).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - Digital microfluidic biochip (DMFB) is a tiny device that can carry out a rich set of bioassays without the need of bulky equipment. However, designing a good general-purpose DMFB architecture is still considered a big challenge today. NP-hard synthesis problems make on-line synthesis virtually impossible on exiting array-based architectures. In this paper, we first elaborate on the major concerns in a DMFB design flow, from the aspects of both synthesis and physical design. We then propose a versatile ring-based architecture VERBA and its corresponding fast one-pass synthesis flow. Experimental results show that VERBA incorporated with the proposed synthesis flow is a better solution than existing architectures and synthesis algorithms especially for real-time cyber-physical systems.

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Huang JD, Liu CH, Yang WH. Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips. In Proceedings of the 2018 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018. IEEE Computer Society. 2018. p. 13-18. 8644984. (IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC). doi: 10.1109/VLSI-SoC.2018.8644984

Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips

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