Unified functional decomposition via encoding for FPGA technology mapping

Jie Hong Jiang*, Jing Yang Jou, Juinn-Dar Huang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

Functional decomposition has recently been adopted for look-up table (LUT)-based field-programmable gate array (FPGA) technology mapping with good results. In this paper we propose a novel method to unify functional single-output and multiple-output decomposition. We first address a compatible class encoding algorithm to minimize the number of compatible classes in the image function. After applying the encoding algorithm, we can therefore improve the decomposability in the subsequent decomposition of the image function. The above encoding algorithm is then extended to encode multiple-output functions through the construction of a hyperfunction. Common subexpressions among these multiple-output functions can be extracted during the decomposition of the hyperfunction. Consequently, we can handle multiple-output decomposition in the same manner as single-output decomposition. Experimental results show that our algorithms are promising.

Original languageEnglish
Pages (from-to)251-260
Number of pages10
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume9
Issue number2
DOIs
StatePublished - Apr 2001

Keywords

  • Compatible class encoding
  • FPGA
  • Functional decomposition
  • Technology mapping

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