@inproceedings{a984248b57ca447c9a75c059f40b4d2e,
title = "Ultrahigh responsivity and tunable photogain BEOL compatible MoS}_{2} phototransistor array for monolithic 3D image sensor with block-level sensing circuits",
abstract = "A large-area and scalable monolayer TMD is feasible to employ in monolithic 3D image sensor scheme. For the first time, we represents a prototype MoS2 phototransistor array with ultrahigh responsivity (> 102 AW}) and tunable photogain (102 105) which can be directly implemented on a CMOS circuit connected with BEOL fine-pitch vertical interconnects. Electric gate pulse modulation mitigates photo gating (PG) and persistent photoconductance (PPC) effects from layered semiconductor interface. Both three-order-of-magnitude improvements of response speed and fine-pitch vertical interconnects empower block-level compressive sensing circuits and global image-signal processing for gain control and data compression. ",
keywords = "image sensor, monolithic 3D, phototransistor, TMD, ultrahigh resposivity",
author = "Yang, {Chih Chao} and Hsieh, {Ping Yi} and Chen, {Po Han} and Hsieh, {Tung Ying} and Po-Tsang Huang and Lin, {Yu Ting} and Shen, {Chang Hong} and Shieh, {Jia Min} and Chang, {Da Chiang} and Yeh, {Wen Kuan} and Wu, {Meng Chyi} and Lee, {Yi Hsien}",
note = "Publisher Copyright: {\textcopyright} 2020 IEEE. Copyright: Copyright 2020 Elsevier B.V., All rights reserved.; 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 ; Conference date: 16-06-2020 Through 19-06-2020",
year = "2020",
month = jun,
doi = "10.1109/VLSITechnology18217.2020.9265017",
language = "English",
series = "Digest of Technical Papers - Symposium on VLSI Technology",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1--2",
booktitle = "2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings",
address = "United States",
}