Ultra-Low Power Robust 3bit/cell Hf0.5Zr0.5O2 Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology

Sourav De*, Darsen D. Lu, Hoang Hiep Le, Soumen Mazumder, Yao Jen Lee, Wei Chih Tseng, Bo Han Qiu, Md Aftab Baig, Po Jung Sung, Chung Jun Su, Chien Ting Wu, Wen Fa Wu, Wen Kuan Yeh, Yeong Her Wang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

45 Scopus citations

Abstract

Scaled ferroelectric FinFET devices were fabricated with post fin formation surface engineering (SE) to remove the line-edge roughness (LER) from the silicon surface by dry etching. This facilitated 3bit/cell operations in 10 nm Hf0.5Zr0.5O2 based ferroelectric FinFETs along with on-state current (ION) to off-state current (IOFF) ratio of 106, extrapolated 10-year retention and endurance above 1011 cycles. Further, we have evaluated its performance in all ferroelectric neural network, where ferroelectric FinFETs are used as synaptic devices or neurons for weight storage. Synaptic core built with optimized devices achieve software-comparable 97.91% inference accuracy on MNIST data and multi-layer perceptron network.

Original languageEnglish
Title of host publication2021 Symposium on VLSI Technology, VLSI Technology 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9784863487802
StatePublished - 2021
Event41st Symposium on VLSI Technology, VLSI Technology 2021 - Virtual, Online, Japan
Duration: 13 Jun 202119 Jun 2021

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume2021-June
ISSN (Print)0743-1562

Conference

Conference41st Symposium on VLSI Technology, VLSI Technology 2021
Country/TerritoryJapan
CityVirtual, Online
Period13/06/2119/06/21

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