Ultra-low-leakage power-rail ESD clamp circuit in nanoscale low-voltage CMOS process

Po Yen Chiu*, Ming-Dou Ker, Fu Yi Tsai, Yeong Jar Chang

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    13 Scopus citations

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    Keyphrases

    Engineering

    Material Science