Ultra-Fast Positive Gate Bias Stress (<100ns) to Understand the Hole Injection in Power p-GaN HEMTs

Zhen Hong Huang, Wei Syuan Lin, Ting Chun Lo, Shun Wei Tang, Szu Chia Chen, Dirk Wellekens, Matteo Borga, Niels Posthuma, Benoit Bakeroot, Stefaan Decoutere, Tian Li Wu*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Ultra-fast positive gate bias stress (<100ns) in p-GaN HEMTs is reported for the first time to investigate the hole injection/trapping phenomena in power p-GaN HEMTs, including the analysis from the time-dependent TCAD simulations. The results indicate that the negative threshold voltage (VTH) shift caused by the hole injection and trapping can be minimized under the ultra-fast positive gate bias, suggesting that p-GaN power HEMTs are promising for the fast turn-on operation that can be immune to PBTI instability.

Original languageEnglish
Title of host publication35th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages139-142
Number of pages4
ISBN (Electronic)9798350396829
DOIs
StatePublished - 2023
Event35th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2023 - Hong Kong, China
Duration: 28 May 20231 Jun 2023

Publication series

NameProceedings of the International Symposium on Power Semiconductor Devices and ICs
Volume2023-May
ISSN (Print)1063-6854

Conference

Conference35th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2023
Country/TerritoryChina
CityHong Kong
Period28/05/231/06/23

Keywords

  • TCAD simulation
  • hole injection/trapping
  • p-GaN HEMT
  • ultra-fast stress

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