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Turbo decoder architecture for beyond-4G applications
Cheng Chi Wong
,
Hsie-Chia Chang
Institute of Electronics
Research output
:
Book/Report
›
Book
›
peer-review
2
Scopus citations
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Keyphrases
3GPP LTE
25%
Area Throughput
25%
Beyond 4G
100%
Circuit Structure
25%
Codec
25%
Decoder Implementation
25%
Encoder-decoder Architecture
100%
Future Communication
25%
Hardware Architecture
25%
Hardware Cost
25%
High Flexibility
25%
High-throughput Decoder
25%
IEEE 802.16
25%
LTE-A
25%
Multiple Parallel
25%
Parallel Architecture
50%
Parallel Mode
25%
Processing Time
25%
Recent Techniques
25%
Telecommunication Systems
25%
Throughput Performance
25%
Traditional Design
25%
Turbo
25%
Turbo Decoder
100%
VLSI Implementation
25%
Engineering
Decoder Implementation
100%
Experimental Result
100%
Functional Unit
100%
Hardware Cost
100%
Illustrates
100%
Processing Time
100%
Telecommunication
100%
Computer Science
Experimental Result
50%
Functional Unit
50%
Hardware Architecture
50%
Hardware Cost
50%
High Throughput
50%
Parallel Architectures
100%
Processing Time
50%
Telecommunication System
50%