True-single-phase all-N-logic differential logic (TADL) for very high-speed complex VLSI

Hong Yi Huang*, Kuo Hsin Cheng, Yuan Hua Chu, Chung-Yu Wu

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations

Abstract

A family of new logic circuits, called true-single-phase all-N-logic differential logic (TADL), are proposed and analyzed. The logic circuits are designed with only NMOS devices in the logic tree. Two kinds of sensing techniques are used for improving the speed operation, namely, the balanced sense amplifier for the differential-input TADL and the unbalanced sense amplifier for the single-input TADL. A complex function can be implemented in a TADL gate and high operation speed can be achieved without dc power dissipation. Only a true-single-phase clock is required to form the fully pipelined systems. Simulation results show that circuits designed by the TADL have the advantages of high-speed operation and low power-delay product.

Original languageEnglish
Pages (from-to)296-299
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
DOIs
StatePublished - 1 Jan 1996
EventProceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA
Duration: 12 May 199615 May 1996

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