Transient device simulation of trap-assisted leakage in non-volatile memory cell

Hiroshi Watanabe

doi:10.1109/SISPAD.2008.4648233

Transient device simulation of trap-assisted leakage in non-volatile memory cell

Hiroshi Watanabe^*

^*Corresponding author for this work

Department of Electrical and Computer Engineering

Research output: Contribution to conference › Paper › peer-review

1 Scopus citations

Abstract

In order to study how a local trap degrades data retention characteristics of floating gate nonvolatile memory cell, a general-purpose Single-Electron Device Simulator (SEDS) developed for Si-dot is improved to carry out a very wide range transient analysis from 0.1 pico-seconds to 10 years. As a result, it is found that the data retention is degraded by the direct tunneling enhanced due to positive charge stored at the trap inside the inter-poly dielectric but not by trap-assisted tunneling.

Original language	English
Pages	45-48
Number of pages	4
DOIs	https://doi.org/10.1109/SISPAD.2008.4648233
State	Published - 1 Dec 2008
Event	2008 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2008 - Hakone, Japan Duration: 9 Sep 2008 → 11 Sep 2008

Conference

Conference	2008 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2008
Country/Territory	Japan
City	Hakone
Period	9/09/08 → 11/09/08

Keywords

Device-simulation
Local trap
Nonvolatile memory
Transient analysis

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10.1109/SISPAD.2008.4648233

Cite this

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abstract = "In order to study how a local trap degrades data retention characteristics of floating gate nonvolatile memory cell, a general-purpose Single-Electron Device Simulator (SEDS) developed for Si-dot is improved to carry out a very wide range transient analysis from 0.1 pico-seconds to 10 years. As a result, it is found that the data retention is degraded by the direct tunneling enhanced due to positive charge stored at the trap inside the inter-poly dielectric but not by trap-assisted tunneling.",

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AU - Watanabe, Hiroshi

PY - 2008/12/1

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N2 - In order to study how a local trap degrades data retention characteristics of floating gate nonvolatile memory cell, a general-purpose Single-Electron Device Simulator (SEDS) developed for Si-dot is improved to carry out a very wide range transient analysis from 0.1 pico-seconds to 10 years. As a result, it is found that the data retention is degraded by the direct tunneling enhanced due to positive charge stored at the trap inside the inter-poly dielectric but not by trap-assisted tunneling.

AB - In order to study how a local trap degrades data retention characteristics of floating gate nonvolatile memory cell, a general-purpose Single-Electron Device Simulator (SEDS) developed for Si-dot is improved to carry out a very wide range transient analysis from 0.1 pico-seconds to 10 years. As a result, it is found that the data retention is degraded by the direct tunneling enhanced due to positive charge stored at the trap inside the inter-poly dielectric but not by trap-assisted tunneling.

KW - Device-simulation

KW - Local trap

KW - Nonvolatile memory

KW - Transient analysis

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DO - 10.1109/SISPAD.2008.4648233

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T2 - 2008 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2008

Y2 - 9 September 2008 through 11 September 2008

ER -

Transient device simulation of trap-assisted leakage in non-volatile memory cell

Abstract

Conference

Keywords

Access to Document

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