Timing mismatch background calibration for time-interleaved ADCs

Tzu Yi Tang; Tsung Heng Tsai; Kevin Chen

doi:10.1109/TENCON.2012.6412195

Timing mismatch background calibration for time-interleaved ADCs

Tzu Yi Tang^*, Tsung Heng Tsai, Kevin Chen

^*Corresponding author for this work

Institute of Pioneer Semiconductor Innovation

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

Time-interleaved analog-to-digital converters (TIADCs) are essential in wide-band communication systems for providing high-speed data conversion. However, TIADCs are sensitive to the sample time mismatch, which results in significantly degraded performance. A new calibration technique is proposed to minimize sample time mismatches among interleaved channels. Correlation between adjacent channels based on zero-crossing detection is utilized. The proposed calibration technique does not require any extra reference signal. Simulation results show that the proposed compensation technique is validated with a high degree of accuracy. For a 4-channel 6-bit TIADC, the undesired spectrum is reduced to below -48dB.

Original language	English
Title of host publication	IEEE TENCON 2012
Subtitle of host publication	Sustainable Development Through Humanitarian Technology
DOIs	https://doi.org/10.1109/TENCON.2012.6412195
State	Published - 2012
Event	2012 IEEE Region 10 Conference: Sustainable Development Through Humanitarian Technology, TENCON 2012 - Cebu, Philippines Duration: 19 Nov 2012 → 22 Nov 2012

Publication series

Name	IEEE Region 10 Annual International Conference, Proceedings/TENCON

Conference

Conference	2012 IEEE Region 10 Conference: Sustainable Development Through Humanitarian Technology, TENCON 2012
Country/Territory	Philippines
City	Cebu
Period	19/11/12 → 22/11/12

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10.1109/TENCON.2012.6412195

Cite this

@inproceedings{5d7d262890ae49b1b51b4ab89727661b,

title = "Timing mismatch background calibration for time-interleaved ADCs",

abstract = "Time-interleaved analog-to-digital converters (TIADCs) are essential in wide-band communication systems for providing high-speed data conversion. However, TIADCs are sensitive to the sample time mismatch, which results in significantly degraded performance. A new calibration technique is proposed to minimize sample time mismatches among interleaved channels. Correlation between adjacent channels based on zero-crossing detection is utilized. The proposed calibration technique does not require any extra reference signal. Simulation results show that the proposed compensation technique is validated with a high degree of accuracy. For a 4-channel 6-bit TIADC, the undesired spectrum is reduced to below -48dB.",

author = "Tang, {Tzu Yi} and Tsai, {Tsung Heng} and Kevin Chen",

year = "2012",

doi = "10.1109/TENCON.2012.6412195",

language = "English",

isbn = "9781467348225",

series = "IEEE Region 10 Annual International Conference, Proceedings/TENCON",

booktitle = "IEEE TENCON 2012",

note = "null ; Conference date: 19-11-2012 Through 22-11-2012",

}

Tang, TY, Tsai, TH & Chen, K 2012, Timing mismatch background calibration for time-interleaved ADCs. in IEEE TENCON 2012: Sustainable Development Through Humanitarian Technology., 6412195, IEEE Region 10 Annual International Conference, Proceedings/TENCON, 2012 IEEE Region 10 Conference: Sustainable Development Through Humanitarian Technology, TENCON 2012, Cebu, Philippines, 19/11/12. https://doi.org/10.1109/TENCON.2012.6412195

Timing mismatch background calibration for time-interleaved ADCs. / Tang, Tzu Yi; Tsai, Tsung Heng; Chen, Kevin.

IEEE TENCON 2012: Sustainable Development Through Humanitarian Technology. 2012. 6412195 (IEEE Region 10 Annual International Conference, Proceedings/TENCON).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

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AU - Tang, Tzu Yi

AU - Tsai, Tsung Heng

AU - Chen, Kevin

PY - 2012

Y1 - 2012

N2 - Time-interleaved analog-to-digital converters (TIADCs) are essential in wide-band communication systems for providing high-speed data conversion. However, TIADCs are sensitive to the sample time mismatch, which results in significantly degraded performance. A new calibration technique is proposed to minimize sample time mismatches among interleaved channels. Correlation between adjacent channels based on zero-crossing detection is utilized. The proposed calibration technique does not require any extra reference signal. Simulation results show that the proposed compensation technique is validated with a high degree of accuracy. For a 4-channel 6-bit TIADC, the undesired spectrum is reduced to below -48dB.

AB - Time-interleaved analog-to-digital converters (TIADCs) are essential in wide-band communication systems for providing high-speed data conversion. However, TIADCs are sensitive to the sample time mismatch, which results in significantly degraded performance. A new calibration technique is proposed to minimize sample time mismatches among interleaved channels. Correlation between adjacent channels based on zero-crossing detection is utilized. The proposed calibration technique does not require any extra reference signal. Simulation results show that the proposed compensation technique is validated with a high degree of accuracy. For a 4-channel 6-bit TIADC, the undesired spectrum is reduced to below -48dB.

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U2 - 10.1109/TENCON.2012.6412195

DO - 10.1109/TENCON.2012.6412195

M3 - Conference contribution

AN - SCOPUS:84873959858

SN - 9781467348225

T3 - IEEE Region 10 Annual International Conference, Proceedings/TENCON

BT - IEEE TENCON 2012

Y2 - 19 November 2012 through 22 November 2012

ER -

Timing mismatch background calibration for time-interleaved ADCs

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