Time-interleaved analog-to-digital converters for digital communications

Tsung Heng Tsai*, Paul J. Hurst, Stephen H. Lewis

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

9 Scopus citations

Abstract

Techniques to overcome the errors caused by the offset, gain, and sample-time mismatches among time-interleaved analog-to-digital converters (ADCs) in high-speed digital communication systems are presented. The errors introduced by these mismatches are adaptively corrected using digital signal processing blocks. Sample-time errors are corrected by modifying the operation of the existing adaptive receive equalizer to reduce the hardware overhead. Simulations are presented that show that the gain, offset, and sample-time mismatches are corrected by the adaptive loops.

Original languageEnglish
Title of host publicationProceedings of the IASTED International Conference on Circuits, Signals, and Systems
EditorsM.H. Rashid
Pages193-198
Number of pages6
StatePublished - 2004
EventProceedings of the IASTED International Conference on Circuits, Signals, and Systems - Clearwater Beach, FL, United States
Duration: 28 Nov 20041 Dec 2004

Publication series

NameProceedings of the IASTED International Conference on Circuits, Signals, and Systems

Conference

ConferenceProceedings of the IASTED International Conference on Circuits, Signals, and Systems
Country/TerritoryUnited States
CityClearwater Beach, FL
Period28/11/041/12/04

Keywords

  • Analog circuits
  • Calibration
  • Communication systems
  • Digital signal processing

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