Time-interleaved analog-to-digital converters for digital communications

Tsung Heng Tsai; Paul J. Hurst; Stephen H. Lewis

Time-interleaved analog-to-digital converters for digital communications

Tsung Heng Tsai^*, Paul J. Hurst, Stephen H. Lewis

^*Corresponding author for this work

Institute of Pioneer Semiconductor Innovation

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

9 Scopus citations

Abstract

Techniques to overcome the errors caused by the offset, gain, and sample-time mismatches among time-interleaved analog-to-digital converters (ADCs) in high-speed digital communication systems are presented. The errors introduced by these mismatches are adaptively corrected using digital signal processing blocks. Sample-time errors are corrected by modifying the operation of the existing adaptive receive equalizer to reduce the hardware overhead. Simulations are presented that show that the gain, offset, and sample-time mismatches are corrected by the adaptive loops.

Original language	English
Title of host publication	Proceedings of the IASTED International Conference on Circuits, Signals, and Systems
Editors	M.H. Rashid
Pages	193-198
Number of pages	6
State	Published - 2004
Event	Proceedings of the IASTED International Conference on Circuits, Signals, and Systems - Clearwater Beach, FL, United States Duration: 28 Nov 2004 → 1 Dec 2004

Publication series

Name	Proceedings of the IASTED International Conference on Circuits, Signals, and Systems

Conference

Conference	Proceedings of the IASTED International Conference on Circuits, Signals, and Systems
Country/Territory	United States
City	Clearwater Beach, FL
Period	28/11/04 → 1/12/04

Keywords

Analog circuits
Calibration
Communication systems
Digital signal processing

Cite this

@inproceedings{3b47b53b0269456da4e36ce5d2afb377,

title = "Time-interleaved analog-to-digital converters for digital communications",

abstract = "Techniques to overcome the errors caused by the offset, gain, and sample-time mismatches among time-interleaved analog-to-digital converters (ADCs) in high-speed digital communication systems are presented. The errors introduced by these mismatches are adaptively corrected using digital signal processing blocks. Sample-time errors are corrected by modifying the operation of the existing adaptive receive equalizer to reduce the hardware overhead. Simulations are presented that show that the gain, offset, and sample-time mismatches are corrected by the adaptive loops.",

keywords = "Analog circuits, Calibration, Communication systems, Digital signal processing",

author = "Tsai, {Tsung Heng} and Hurst, {Paul J.} and Lewis, {Stephen H.}",

year = "2004",

language = "English",

isbn = "0889864551",

series = "Proceedings of the IASTED International Conference on Circuits, Signals, and Systems",

pages = "193--198",

editor = "M.H. Rashid",

booktitle = "Proceedings of the IASTED International Conference on Circuits, Signals, and Systems",

note = "null ; Conference date: 28-11-2004 Through 01-12-2004",

}

Tsai, TH, Hurst, PJ & Lewis, SH 2004, Time-interleaved analog-to-digital converters for digital communications. in MH Rashid (ed.), Proceedings of the IASTED International Conference on Circuits, Signals, and Systems., 449-189, Proceedings of the IASTED International Conference on Circuits, Signals, and Systems, pp. 193-198, Proceedings of the IASTED International Conference on Circuits, Signals, and Systems, Clearwater Beach, FL, United States, 28/11/04.

Time-interleaved analog-to-digital converters for digital communications. / Tsai, Tsung Heng; Hurst, Paul J.; Lewis, Stephen H.

Proceedings of the IASTED International Conference on Circuits, Signals, and Systems. ed. / M.H. Rashid. 2004. p. 193-198 449-189 (Proceedings of the IASTED International Conference on Circuits, Signals, and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Time-interleaved analog-to-digital converters for digital communications

AU - Tsai, Tsung Heng

AU - Hurst, Paul J.

AU - Lewis, Stephen H.

PY - 2004

Y1 - 2004

N2 - Techniques to overcome the errors caused by the offset, gain, and sample-time mismatches among time-interleaved analog-to-digital converters (ADCs) in high-speed digital communication systems are presented. The errors introduced by these mismatches are adaptively corrected using digital signal processing blocks. Sample-time errors are corrected by modifying the operation of the existing adaptive receive equalizer to reduce the hardware overhead. Simulations are presented that show that the gain, offset, and sample-time mismatches are corrected by the adaptive loops.

AB - Techniques to overcome the errors caused by the offset, gain, and sample-time mismatches among time-interleaved analog-to-digital converters (ADCs) in high-speed digital communication systems are presented. The errors introduced by these mismatches are adaptively corrected using digital signal processing blocks. Sample-time errors are corrected by modifying the operation of the existing adaptive receive equalizer to reduce the hardware overhead. Simulations are presented that show that the gain, offset, and sample-time mismatches are corrected by the adaptive loops.

KW - Analog circuits

KW - Calibration

KW - Communication systems

KW - Digital signal processing

UR - http://www.scopus.com/inward/record.url?scp=11144254605&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:11144254605

SN - 0889864551

SN - 9780889864559

T3 - Proceedings of the IASTED International Conference on Circuits, Signals, and Systems

SP - 193

EP - 198

BT - Proceedings of the IASTED International Conference on Circuits, Signals, and Systems

A2 - Rashid, M.H.

Y2 - 28 November 2004 through 1 December 2004

ER -

Time-interleaved analog-to-digital converters for digital communications

Abstract

Publication series

Conference

Keywords

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