Three dimensional integration of ReRAMs

Boris Hudec; Che-Chia Chang; I-Ting Wang; Karol Frohlich; Tuo-Hung Hou

doi:10.1109/NANO.2018.8626351

Three dimensional integration of ReRAMs

Boris Hudec^*, Che-Chia Chang, I-Ting Wang, Karol Frohlich, Tuo-Hung Hou

^*Corresponding author for this work

Department of Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Storage-class memory, non-volatile, ultra-dense and lightning fast, may enable memory-driven computing to revolutionize the current architectures leading to an on-chip processing of vast amount of data.

3D vertical resistive random access memory (ReRAM) is a hot candidate for storage-class memory. In this talk we review current state-of-the-art works which offer promising solutions, utilizing either filamentary or non-filamentary ReRAM designs, including our own. We will discuss the pros and cons of different approaches and summarize the open problems, drawing possible solutions.

Original language	English
Title of host publication	2018 IEEE 18TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)
Publisher	IEEE
Pages	1-2
Number of pages	2
DOIs	https://doi.org/10.1109/NANO.2018.8626351
State	Published - 23 Jul 2018
Event	18th IEEE International Conference on Nanotechnology (IEEE-NANO) - Cork, Ireland Duration: 23 Jul 2018 → 26 Jul 2018

Publication series

Name	IEEE International Conference on Nanotechnology
Publisher	IEEE
ISSN (Print)	1944-9399

Conference

Conference	18th IEEE International Conference on Nanotechnology (IEEE-NANO)
Country/Territory	Ireland
City	Cork
Period	23/07/18 → 26/07/18

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10.1109/NANO.2018.8626351

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@inproceedings{3f27506d899f4ad698b26e101cc434ac,

title = "Three dimensional integration of ReRAMs",

abstract = "Storage-class memory, non-volatile, ultra-dense and lightning fast, may enable memory-driven computing to revolutionize the current architectures leading to an on-chip processing of vast amount of data.3D vertical resistive random access memory (ReRAM) is a hot candidate for storage-class memory. In this talk we review current state-of-the-art works which offer promising solutions, utilizing either filamentary or non-filamentary ReRAM designs, including our own. We will discuss the pros and cons of different approaches and summarize the open problems, drawing possible solutions.",

author = "Boris Hudec and Che-Chia Chang and I-Ting Wang and Karol Frohlich and Tuo-Hung Hou",

year = "2018",

month = jul,

day = "23",

doi = "10.1109/NANO.2018.8626351",

language = "English",

series = "IEEE International Conference on Nanotechnology",

publisher = "IEEE",

pages = "1--2",

booktitle = "2018 IEEE 18TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)",

note = "18th IEEE International Conference on Nanotechnology (IEEE-NANO) ; Conference date: 23-07-2018 Through 26-07-2018",

}

Hudec, B, Chang, C-C, Wang, I-T, Frohlich, K & Hou, T-H 2018, Three dimensional integration of ReRAMs. in 2018 IEEE 18TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)., 8626351, IEEE International Conference on Nanotechnology, IEEE, pp. 1-2, 18th IEEE International Conference on Nanotechnology (IEEE-NANO), Cork, Ireland, 23/07/18. https://doi.org/10.1109/NANO.2018.8626351

TY - GEN

T1 - Three dimensional integration of ReRAMs

AU - Hudec, Boris

AU - Chang, Che-Chia

AU - Wang, I-Ting

AU - Frohlich, Karol

AU - Hou, Tuo-Hung

PY - 2018/7/23

Y1 - 2018/7/23

N2 - Storage-class memory, non-volatile, ultra-dense and lightning fast, may enable memory-driven computing to revolutionize the current architectures leading to an on-chip processing of vast amount of data.3D vertical resistive random access memory (ReRAM) is a hot candidate for storage-class memory. In this talk we review current state-of-the-art works which offer promising solutions, utilizing either filamentary or non-filamentary ReRAM designs, including our own. We will discuss the pros and cons of different approaches and summarize the open problems, drawing possible solutions.

AB - Storage-class memory, non-volatile, ultra-dense and lightning fast, may enable memory-driven computing to revolutionize the current architectures leading to an on-chip processing of vast amount of data.3D vertical resistive random access memory (ReRAM) is a hot candidate for storage-class memory. In this talk we review current state-of-the-art works which offer promising solutions, utilizing either filamentary or non-filamentary ReRAM designs, including our own. We will discuss the pros and cons of different approaches and summarize the open problems, drawing possible solutions.

U2 - 10.1109/NANO.2018.8626351

DO - 10.1109/NANO.2018.8626351

M3 - Conference contribution

T3 - IEEE International Conference on Nanotechnology

SP - 1

EP - 2

BT - 2018 IEEE 18TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)

PB - IEEE

T2 - 18th IEEE International Conference on Nanotechnology (IEEE-NANO)

Y2 - 23 July 2018 through 26 July 2018

ER -

Three dimensional integration of ReRAMs

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