TY - JOUR
T1 - Three-Dimensional Integrated Circuit (3D IC) Key Technology
T2 - Through-Silicon Via (TSV)
AU - Shen, Wen Wei
AU - Chen, Kuan-Neng
PY - 2017/1/19
Y1 - 2017/1/19
N2 - 3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.
AB - 3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.
KW - Three-dimensional integrated circuit (3D IC)
KW - Through-silicon via (TSV)
UR - http://www.scopus.com/inward/record.url?scp=85009951630&partnerID=8YFLogxK
U2 - 10.1186/s11671-017-1831-4
DO - 10.1186/s11671-017-1831-4
M3 - Article
AN - SCOPUS:85009951630
SN - 1931-7573
VL - 12
SP - 1
EP - 9
JO - Nanoscale Research Letters
JF - Nanoscale Research Letters
IS - 1
M1 - 56
ER -