TY - GEN
T1 - Theoretical study on geometry and temperature effects of thermoelectric properties of Si and Ge nanowires
AU - Huang, Wen
AU - Koong, Chee Shin
AU - Liang, Gengchiau
PY - 2010
Y1 - 2010
N2 - Thermoelectric properties of Si and Ge nanowires are studied theoretically using sp3d5s* tight-binding and ballistic transport approach. We found that the Seebeck coefficient and power factor per area depend on the nanowire size and its orientation. In addition, for nano-scale nanowires, cross-sectional shape effect is considerable and transmission mode dominates the performance. Temperature also has a great impact on the thermoelectric performance of nanowires. The power factor of Si nanowires along different orientations is approaching to the same value as temperature growing higher than 300 K; while power factor of Ge nanowires along [100] is the largest at high temperature, but the smallest at extreme low temperature.
AB - Thermoelectric properties of Si and Ge nanowires are studied theoretically using sp3d5s* tight-binding and ballistic transport approach. We found that the Seebeck coefficient and power factor per area depend on the nanowire size and its orientation. In addition, for nano-scale nanowires, cross-sectional shape effect is considerable and transmission mode dominates the performance. Temperature also has a great impact on the thermoelectric performance of nanowires. The power factor of Si nanowires along different orientations is approaching to the same value as temperature growing higher than 300 K; while power factor of Ge nanowires along [100] is the largest at high temperature, but the smallest at extreme low temperature.
UR - http://www.scopus.com/inward/record.url?scp=78751502495&partnerID=8YFLogxK
U2 - 10.1109/ICSICT.2010.5667699
DO - 10.1109/ICSICT.2010.5667699
M3 - Conference contribution
AN - SCOPUS:78751502495
SN - 9781424457984
T3 - ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
SP - 1832
EP - 1834
BT - ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
T2 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology
Y2 - 1 November 2010 through 4 November 2010
ER -