The zero-temperature-coefficient point modeling of DTMOS in CMOS Integration

Kuan Ti Wang*, Wan Chyi Lin, Tien-Sheng Chao

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

5 Scopus citations

Abstract

For the first time, analytical expressions of zero-temperature-coefficient (ZTC) point modeling of DTMOS transistor are successfully presented in detail. New analytical formulations for the linear and saturation regions of DTMOS transistor operation that make certain the drive current to be temperature independent for the ideal gate voltage are developed. The maximum errors of 0.87% and 2.35% in the linear and saturation regions, respectively, confirm a good agreement between our DTMOS ZTC point model and the experimental data. Compared to conventional MOSFET, the lower Vg (ZTC) with higher overdrive current of DTMOS improves the integrated circuit speed and efficiency for the low-power-consumption concept in green CMOS technology.

Original languageEnglish
Article number5540257
Pages (from-to)1071-1073
Number of pages3
JournalIEEE Electron Device Letters
Volume31
Issue number10
DOIs
StatePublished - 1 Oct 2010

Keywords

  • DTMOS
  • modeling
  • strain
  • zero temperature coefficient (ZTC)

Fingerprint

Dive into the research topics of 'The zero-temperature-coefficient point modeling of DTMOS in CMOS Integration'. Together they form a unique fingerprint.

Cite this