The impact of layout-dependent STI stress and effective width on low-frequency noise and high-frequency performance in nanoscale nMOSFETs

Kuo Liang Yeh*, Jyh-Chyurn Guo

*Corresponding author for this work

    Research output: Contribution to journalArticlepeer-review

    10 Scopus citations

    Abstract

    The impact of channel width scaling on low-frequency noise (LFN) and high-frequency performance in multifinger MOSFETs is reported in this paper. The compressive stress from shallow trench isolation (STI) cannot explain the lower LFN in extremely narrow devices. STI top corner rounding (TCR)-induced Δ W is identified as an important factor that is responsible for the increase in transconductance Gm and the reduction in LFN with width scaling to nanoscale regime. A semi-empirical model was derived to simulate the effective mobility (μeff) degradation from STI stress and the increase in effective width (Weff) from ΔW due to STI TCR. The proposed model can accurately predict width scaling effect on Gm based on a tradeoff between μeff and Weff. The enhanced STI stress may lead to an increase in interface traps density (Nit), but the influence is relatively minor and can be compensated by the Weff effect. Unfortunately, the extremely narrow devices suffer fT degradation due to an increase in Cgg. The investigation of impact from width scaling on μeff, Gm, and LFN, as well as the tradeoff between LFN and high-frequency performance, provides an important layout guideline for analog and RF circuit design.

    Original languageEnglish
    Article number5594629
    Pages (from-to)3092-3100
    Number of pages9
    JournalIEEE Transactions on Electron Devices
    Volume57
    Issue number11
    DOIs
    StatePublished - 1 Nov 2010

    Keywords

    • Effective mobility
    • effective width
    • low-frequency noise (LFN)
    • shallow trench isolation (STI) stress

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