The effect of IEC-like fast transients on RC-triggered ESD power clamps

Cheng Cheng Yen*, Ming-Dou Ker

*Corresponding author for this work

    Research output: Contribution to journalArticlepeer-review

    10 Scopus citations


    Four power-rail electrostatic-discharge (ESD) clamp circuits with different ESD-transient detection circuits have been fabricated in a 0.18-μm CMOS process to investigate their susceptibility against electrical fast-transient (EFT) tests. Under EFT tests, where the integrated circuits in a microelectronic system have been powered up, the feedback loop used in the power-rail ESD clamp circuits may lock the ESD-clamping NMOS in a "latch-on" state. Such a latch-on ESD-clamping NMOS will conduct a huge current between the power lines to perform a latchuplike failure after EFT tests. A modified power-rail ESD clamp circuit has been proposed to solve this latchuplike failure and to provide a high-enough chip-level ESD robustness.

    Original languageEnglish
    Pages (from-to)1204-1210
    Number of pages7
    JournalIEEE Transactions on Electron Devices
    Issue number6
    StatePublished - 28 Apr 2009


    • ESD protection circuit
    • Electrical fast-transient (EFT) test
    • Electromagnetic compatibility
    • Electrostatic discharge (ESD)
    • Latchup
    • System-level ESD stress


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