Test structures to verify ESD robustness of on-glass devices in LTPS technology

Ming-Dou Ker; Chih Kang Deng; Sheng Chieh Yang; Yaw Ming Tasi

doi:10.1109/ICMTS.2004.1309293

Test structures to verify ESD robustness of on-glass devices in LTPS technology

Ming-Dou Ker^*, Chih Kang Deng, Sheng Chieh Yang, Yaw Ming Tasi

^*Corresponding author for this work

Research output: Contribution to conference › Paper › peer-review

Abstract

Different test structures used to investigate the electrostatic discharge (ESD) robustness of on-glass device in Low Temperature Poly-Si (LTPS) process are proposed in this paper. The transmission line pulse generator (TLPG) is used to monitor the I-V behaviors of on-glass devices in the high-current region, and to evaluate the robustness of those LTPS devices during ESD stress condition. Finally, a successful ESD protection design with P ⁺ -i-N ⁺ diodes and a VDD-to-VSS ESD clamp circuit integrated on a LCD panel has been demonstrated with a machine-model (MM) ESD level of up to 275 V, whereas the traditional one only can sustain 100 V MM ESD stress.

Original language	English
Pages	13-17
Number of pages	5
DOIs	https://doi.org/10.1109/ICMTS.2004.1309293
State	Published - Mar 2004
Event	Proceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004) - Awaji, Japan Duration: 22 Mar 2004 → 25 Mar 2004

Conference

Conference	Proceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004)
Country/Territory	Japan
City	Awaji
Period	22/03/04 → 25/03/04

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10.1109/ICMTS.2004.1309293

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title = "Test structures to verify ESD robustness of on-glass devices in LTPS technology",

abstract = " Different test structures used to investigate the electrostatic discharge (ESD) robustness of on-glass device in Low Temperature Poly-Si (LTPS) process are proposed in this paper. The transmission line pulse generator (TLPG) is used to monitor the I-V behaviors of on-glass devices in the high-current region, and to evaluate the robustness of those LTPS devices during ESD stress condition. Finally, a successful ESD protection design with P + -i-N + diodes and a VDD-to-VSS ESD clamp circuit integrated on a LCD panel has been demonstrated with a machine-model (MM) ESD level of up to 275 V, whereas the traditional one only can sustain 100 V MM ESD stress. ",

author = "Ming-Dou Ker and Deng, {Chih Kang} and Yang, {Sheng Chieh} and Tasi, {Yaw Ming}",

year = "2004",

month = mar,

doi = "10.1109/ICMTS.2004.1309293",

language = "English",

pages = "13--17",

note = "Proceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004) ; Conference date: 22-03-2004 Through 25-03-2004",

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T1 - Test structures to verify ESD robustness of on-glass devices in LTPS technology

AU - Ker, Ming-Dou

AU - Deng, Chih Kang

AU - Yang, Sheng Chieh

AU - Tasi, Yaw Ming

PY - 2004/3

Y1 - 2004/3

N2 - Different test structures used to investigate the electrostatic discharge (ESD) robustness of on-glass device in Low Temperature Poly-Si (LTPS) process are proposed in this paper. The transmission line pulse generator (TLPG) is used to monitor the I-V behaviors of on-glass devices in the high-current region, and to evaluate the robustness of those LTPS devices during ESD stress condition. Finally, a successful ESD protection design with P + -i-N + diodes and a VDD-to-VSS ESD clamp circuit integrated on a LCD panel has been demonstrated with a machine-model (MM) ESD level of up to 275 V, whereas the traditional one only can sustain 100 V MM ESD stress.

AB - Different test structures used to investigate the electrostatic discharge (ESD) robustness of on-glass device in Low Temperature Poly-Si (LTPS) process are proposed in this paper. The transmission line pulse generator (TLPG) is used to monitor the I-V behaviors of on-glass devices in the high-current region, and to evaluate the robustness of those LTPS devices during ESD stress condition. Finally, a successful ESD protection design with P + -i-N + diodes and a VDD-to-VSS ESD clamp circuit integrated on a LCD panel has been demonstrated with a machine-model (MM) ESD level of up to 275 V, whereas the traditional one only can sustain 100 V MM ESD stress.

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DO - 10.1109/ICMTS.2004.1309293

M3 - Paper

AN - SCOPUS:3042604457

SP - 13

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T2 - Proceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004)

Y2 - 22 March 2004 through 25 March 2004

ER -

Test structures to verify ESD robustness of on-glass devices in LTPS technology

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