@inproceedings{dd75a2b9a0d54cdfb503f21614391a6a,
title = "Test Circuit Design for Accurately Characterizing Cells' Output Currents in a Read-Decoupled 8T SRAM Array for Computing-in-Memory Applications",
abstract = "Computing-in-memory (CIM) is a promising technique for energy-efficiently conducting the massive amount of required multiply-And-Accumulate (MAC) calculations in neural networks (NNs). The read-decoupled 8T (RD8T) SRAM cell is popular in the CIM designs because of being read disturbance free. However, local process variations may lead significant errors to the CIM results. This work proposes an accurate on-chip test circuit design for characterizing the output current of every RD8T SRAM cell in a 8-kb RD8T SRAM array fabricated in 90nm CMOS. The experimental results show the detailed and accurate spatial distribution of the RD8T cells which helps optimize the CIM circuit design.",
keywords = "characterization, CIM, current, RD8T, SRAM",
author = "Hong, {Hao Chiao} and Lin, {Long Yi} and Chen, {Bo Chang}",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 35th International Conference on Microelectronic Test Structure, ICMTS 2023 ; Conference date: 27-03-2023 Through 30-03-2023",
year = "2023",
doi = "10.1109/ICMTS55420.2023.10094078",
language = "English",
series = "IEEE International Conference on Microelectronic Test Structures",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2023 35th International Conference on Microelectronic Test Structure, ICMTS 2023",
address = "美國",
}