TY - JOUR
T1 - Temperature-Dependent Hydrogen Modulations of Ultra-Scaled a-IGZO Thin Film Transistor Under Gate Bias Stress
AU - Aslam, Muhammad
AU - Chang, Shu Wei
AU - Chuang, Min Hui
AU - Chen, Yi Ho
AU - Lee, Yao Jen
AU - Li, Yiming
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2024
Y1 - 2024
N2 - Recently, a-IGZO has advanced toward the next-generation electronics system because of its compatibility with complementary metal oxide semiconductor (CMOS) and back-end-of-line (BOEL) based systems. A systematic electrical characterization of a-IGZO TFT related to reliability issues, such as positive bias temperature stress (PBTS) and negative bias temperature stress (NBTS), would entitle its integration into novel electronics systems. Unexpectedly, PBTS is characterized by the transition of positive Vth shift to negative Vth shift (ΔVth, the positive shift followed by the stress and temperature activated negative shift). This transition is attributed to charge trapping/trap-site generations and hydrogen migration to the active layer. The ΔVth shift mechanism depends on the temperature and voltage stress. On the other hand, a negative ΔVth shift has been observed during the NBTS operation and could be attributed to the hole trapping at the interface of GI/IGZO. An effective suppression of the gate leakage current has also been observed during reliability tests. Simulation results reveal a pronounced potential at the edges of source and drain regions, and considered the origin of hydrogen migration into the IGZO layer. Thermal image results also reveal the strong temperature/potential distribution at the edges of the source/drain regions, indorsing the simulation results.
AB - Recently, a-IGZO has advanced toward the next-generation electronics system because of its compatibility with complementary metal oxide semiconductor (CMOS) and back-end-of-line (BOEL) based systems. A systematic electrical characterization of a-IGZO TFT related to reliability issues, such as positive bias temperature stress (PBTS) and negative bias temperature stress (NBTS), would entitle its integration into novel electronics systems. Unexpectedly, PBTS is characterized by the transition of positive Vth shift to negative Vth shift (ΔVth, the positive shift followed by the stress and temperature activated negative shift). This transition is attributed to charge trapping/trap-site generations and hydrogen migration to the active layer. The ΔVth shift mechanism depends on the temperature and voltage stress. On the other hand, a negative ΔVth shift has been observed during the NBTS operation and could be attributed to the hole trapping at the interface of GI/IGZO. An effective suppression of the gate leakage current has also been observed during reliability tests. Simulation results reveal a pronounced potential at the edges of source and drain regions, and considered the origin of hydrogen migration into the IGZO layer. Thermal image results also reveal the strong temperature/potential distribution at the edges of the source/drain regions, indorsing the simulation results.
KW - a-IGZO TFT
KW - atomic layer deposition (ALD)
KW - electrical instability
KW - high-? HfO2
KW - negative bias temperature stress (NBTS)
KW - oxide semiconductor (OS)
KW - positive bias temperature stress (PBTS)
UR - http://www.scopus.com/inward/record.url?scp=85190169019&partnerID=8YFLogxK
U2 - 10.1109/OJNANO.2024.3386123
DO - 10.1109/OJNANO.2024.3386123
M3 - Article
AN - SCOPUS:85190169019
SN - 2644-1292
VL - 5
SP - 9
EP - 16
JO - IEEE Open Journal of Nanotechnology
JF - IEEE Open Journal of Nanotechnology
ER -