Techniques for the trace-driven simulation of cache performance

Susan J. Eggers*, Edward D. Lazowska, Yi-Bing Lin

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations


A survey is presented of three techniques for the trace-driven simulation of cache designs: stack analysis methodologies that make it possible to obtain performance measures for a wide variety of cache designs from a single run of the simulator, compression algorithms specifically tailored to memory reference traces, and an approach to parallel trace-driven simulation of multiprocessor caches that dramatically reduces the simulation's synchronization and thus its running time.

Original languageEnglish
Pages (from-to)1042-1046
Number of pages5
JournalWinter Simulation Conference Proceedings
StatePublished - 1 Dec 1989
Event1989 Winter Simulation Conference Proceedings - WSC '89 - Washington, DC, USA
Duration: 4 Dec 19896 Dec 1989


Dive into the research topics of 'Techniques for the trace-driven simulation of cache performance'. Together they form a unique fingerprint.

Cite this