Systolic building block for logic-on-logic 3D-IC implementations of convolutional neural networks

Keyphrases

• 3D IC 100%
• Convolutional Neural Network 100%
• Systolic Array 100%
• Microbump 66%
• Efficient Convolutional Neural Network 66%
• Neural Network Inference 66%
• Low Latency 33%
• Energy Efficient 33%
• Performance Improvement 33%
• Service Provider 33%
• 3D Technology 33%
• Neural Network Implementation 33%
• Chip Design 33%
• Design Service 33%
• Power Analysis 33%
• Advanced Packaging 33%
• Monolithic 3-D (M3-D) 33%
• Delay Analysis 33%
• Block Architecture 33%

Computer Science

• Convolutional Neural Network 100%
• Building-Blocks 100%
• Systolic Arrays 75%
• Network Inference 50%
• Energy Efficient 25%
• Performance Improvement 25%
• Power Analysis 25%
• Service Provider 25%

Engineering

• Building Block 100%
• Convolutional Neural Network 100%
• Systolic Arrays 75%
• Service Provider 25%
• Performance Improvement 25%