Suppression of Row Hammer Effect by Doping Profile Modification in Saddle-Fin Array Devices for Sub-30-nm DRAM Technology

The row hammer effect has become a reliability issue that cannot be ignored in sub-30-nm dynamic random-access memory (DRAM) products because of the narrow isolation spacing between the array devices. Improving the row hammer effect via fabrication process optimization is first proposed in this paper. An additional phosphorus (P) implantation with energy and dosage modification applied in the common source area between two adjacent buried word lines of the access devices and energy adjustment of the well implantation are applied to provide a doping profile modification in the array device. With the proper implantation setting of the high energy and 2X dosage in the additional P implantation, a localized shielding effect from the electric field by a depletion effect could be used to reduce the chances of hammering gate-induced electrons in the channel leaking to the adjacent access device. This proposed mechanism could be supported by the experimental results of the doping profile. Therefore, the row hammer effect can be suppressed by up to 30% in normalized fail bit counts. This proposed methodology could be used in future generations to suppress the row hammer effect in DRAMs.