Supplemental PDK for ASAP7 using synopsys flow

Shinichi Nishizawa; Shih Ting Lin; Yih Lang Li; Hidetoshi Onodera

doi:10.2197/IPSJTSLDM.14.24

Supplemental PDK for ASAP7 using synopsys flow

Shinichi Nishizawa^*, Shih Ting Lin, Yih Lang Li, Hidetoshi Onodera

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

Original language	English
Pages (from-to)	24-26
Number of pages	3
Journal	IPSJ Transactions on System LSI Design Methodology
Volume	14
DOIs	https://doi.org/10.2197/IPSJTSLDM.14.24
State	Published - Aug 2021

Keywords

Process design kit, ASAP7

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10.2197/IPSJTSLDM.14.24

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title = "Supplemental PDK for ASAP7 using synopsys flow",

abstract = "This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author{\textquoteright}s GitHub site for both acamemical and educational usage.",

keywords = "Process design kit, ASAP7",

author = "Shinichi Nishizawa and Lin, {Shih Ting} and Li, {Yih Lang} and Hidetoshi Onodera",

note = "Publisher Copyright: c 2021 Information Processing Society of Japan",

year = "2021",

month = aug,

doi = "10.2197/IPSJTSLDM.14.24",

language = "English",

volume = "14",

pages = "24--26",

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AU - Nishizawa, Shinichi

AU - Lin, Shih Ting

AU - Li, Yih Lang

AU - Onodera, Hidetoshi

PY - 2021/8

Y1 - 2021/8

N2 - This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

AB - This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

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DO - 10.2197/IPSJTSLDM.14.24

M3 - Article

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EP - 26

JO - IPSJ Transactions on System LSI Design Methodology

JF - IPSJ Transactions on System LSI Design Methodology

ER -

Supplemental PDK for ASAP7 using synopsys flow

Abstract

Keywords

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