Substrate-bias-dependent dielectric breakdown in ultrathin-oxide p-metal-oxide-semiconductor field-effect transistors

Sinclair Chiang*, M. F. Lu, S. Huang-Lu, S. C. Chien, Ta-Hui Wang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review


An explanation of the breakdown behavior of ultrathin-gate-oxide (1.6 nm) p -metal-oxide-semiconductor field-effect transistors under a reverse substrate bias is presented. A significant degradation in lifetime induced by a positive substrate bias and a decrease in the power-law exponent (n) were observed. The quantitative hydrogen-based model [J. Sune and E. Wu, Digest of Technical Papers, 2001 Symposium on VLSI Technology, Kyoto, Japan, 12-14 June 2001 (unpublished), p. 97] is used to explain this observation while taking the channel quantization effect into consideration. Using this model, the stress voltage dependence of time-dependent dielectric breakdown in our experiment fits well with simulation results. This indicates that the degradation is due to the channel hole quantization-enhanced dissipation energy of injected electrons at the anode interface.

Original languageEnglish
Article number024105
JournalJournal of Applied Physics
Issue number2
StatePublished - 15 Jul 2005


Dive into the research topics of 'Substrate-bias-dependent dielectric breakdown in ultrathin-oxide p-metal-oxide-semiconductor field-effect transistors'. Together they form a unique fingerprint.

Cite this