Sub-ns Access Sub-mW/GHz 32 Kb SRAM with 0.45 v Cross-Point-5T Cell and Built-in Y-Line

C. Y. He, K. H. Tang, T. S. Chen, K. Y. Chang, C. H. Lin, K. Sato, Shyh-Jye Jou, P. H. Chen, Hung-Ming Chen, B. D. Rong, K. Itoh

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

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