Study on latchup path between HV-LDMOS and LVCMOS in a 0.16-μm 30-V/1.8-V BCD technology

Chia Tsen Dai; Ming-Dou Ker; Yeh Ning Jou; Shao Chang Huang; Geeng Lih Lin; Jian Hsing Lee

doi:10.23919/EOS/ESD.2018.8509772

Study on latchup path between HV-LDMOS and LVCMOS in a 0.16-μm 30-V/1.8-V BCD technology

Chia Tsen Dai, Ming-Dou Ker, Yeh Ning Jou, Shao Chang Huang, Geeng Lih Lin, Jian Hsing Lee

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

The latchup path between high-voltage (HV) PMOS and low-voltage (LV) PMOS in a 0.16-μm 30- V/1.8-V bipolar-CMOS-DMOS (BCD) technology is studied. From the experiment results on silicon chip, this path can be easily induced into latchup state during the current-trigger latchup test. Therefore, the related layout rules should be carefully specified to avoid such HV-to-LV cross-domain latchup issue.

Original language	English
Title of host publication	Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2018
Publisher	ESD Association
Number of pages	6
ISBN (Electronic)	1585373028
DOIs	https://doi.org/10.23919/EOS/ESD.2018.8509772
State	Published - 23 Sep 2018
Event	40th Annual Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2018 - Reno, United States Duration: 23 Sep 2018 → 28 Sep 2018

Publication series

Name	Electrical Overstress/Electrostatic Discharge Symposium Proceedings
Volume	2018-September
ISSN (Print)	0739-5159

Conference

Conference	40th Annual Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2018
Country/Territory	United States
City	Reno
Period	23/09/18 → 28/09/18

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10.23919/EOS/ESD.2018.8509772

Cite this

Dai, C. T., Ker, M.-D., Jou, Y. N., Huang, S. C., Lin, G. L., & Lee, J. H. (2018). Study on latchup path between HV-LDMOS and LVCMOS in a 0.16-μm 30-V/1.8-V BCD technology. In Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2018 Article 8509772 (Electrical Overstress/Electrostatic Discharge Symposium Proceedings; Vol. 2018-September). ESD Association. https://doi.org/10.23919/EOS/ESD.2018.8509772

@inproceedings{45751ee424f74c6ca8fc95c776a54fd3,

title = "Study on latchup path between HV-LDMOS and LVCMOS in a 0.16-μm 30-V/1.8-V BCD technology",

abstract = "The latchup path between high-voltage (HV) PMOS and low-voltage (LV) PMOS in a 0.16-μm 30- V/1.8-V bipolar-CMOS-DMOS (BCD) technology is studied. From the experiment results on silicon chip, this path can be easily induced into latchup state during the current-trigger latchup test. Therefore, the related layout rules should be carefully specified to avoid such HV-to-LV cross-domain latchup issue.",

author = "Dai, {Chia Tsen} and Ming-Dou Ker and Jou, {Yeh Ning} and Huang, {Shao Chang} and Lin, {Geeng Lih} and Lee, {Jian Hsing}",

note = "Publisher Copyright: {\textcopyright} 2018 ESD Association. All rights reserved.; 40th Annual Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2018 ; Conference date: 23-09-2018 Through 28-09-2018",

year = "2018",

month = sep,

day = "23",

doi = "10.23919/EOS/ESD.2018.8509772",

language = "English",

series = "Electrical Overstress/Electrostatic Discharge Symposium Proceedings",

publisher = "ESD Association",

booktitle = "Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2018",

}

Dai, CT, Ker, M-D, Jou, YN, Huang, SC, Lin, GL & Lee, JH 2018, Study on latchup path between HV-LDMOS and LVCMOS in a 0.16-μm 30-V/1.8-V BCD technology. in Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2018., 8509772, Electrical Overstress/Electrostatic Discharge Symposium Proceedings, vol. 2018-September, ESD Association, 40th Annual Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2018, Reno, United States, 23/09/18. https://doi.org/10.23919/EOS/ESD.2018.8509772

Study on latchup path between HV-LDMOS and LVCMOS in a 0.16-μm 30-V/1.8-V BCD technology. / Dai, Chia Tsen; Ker, Ming-Dou; Jou, Yeh Ning et al.
Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2018. ESD Association, 2018. 8509772 (Electrical Overstress/Electrostatic Discharge Symposium Proceedings; Vol. 2018-September).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Study on latchup path between HV-LDMOS and LVCMOS in a 0.16-μm 30-V/1.8-V BCD technology

AU - Dai, Chia Tsen

AU - Ker, Ming-Dou

AU - Jou, Yeh Ning

AU - Huang, Shao Chang

AU - Lin, Geeng Lih

AU - Lee, Jian Hsing

PY - 2018/9/23

Y1 - 2018/9/23

N2 - The latchup path between high-voltage (HV) PMOS and low-voltage (LV) PMOS in a 0.16-μm 30- V/1.8-V bipolar-CMOS-DMOS (BCD) technology is studied. From the experiment results on silicon chip, this path can be easily induced into latchup state during the current-trigger latchup test. Therefore, the related layout rules should be carefully specified to avoid such HV-to-LV cross-domain latchup issue.

AB - The latchup path between high-voltage (HV) PMOS and low-voltage (LV) PMOS in a 0.16-μm 30- V/1.8-V bipolar-CMOS-DMOS (BCD) technology is studied. From the experiment results on silicon chip, this path can be easily induced into latchup state during the current-trigger latchup test. Therefore, the related layout rules should be carefully specified to avoid such HV-to-LV cross-domain latchup issue.

UR - http://www.scopus.com/inward/record.url?scp=85056897729&partnerID=8YFLogxK

U2 - 10.23919/EOS/ESD.2018.8509772

DO - 10.23919/EOS/ESD.2018.8509772

M3 - Conference contribution

AN - SCOPUS:85056897729

T3 - Electrical Overstress/Electrostatic Discharge Symposium Proceedings

BT - Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2018

PB - ESD Association

T2 - 40th Annual Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2018

Y2 - 23 September 2018 through 28 September 2018

ER -

Study on latchup path between HV-LDMOS and LVCMOS in a 0.16-μm 30-V/1.8-V BCD technology

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