Study and Verification on the Latch-Up Path between I/O pMOS and N-Type Decoupling Capacitors in 0.18-\mu m CMOS Technology

Keyphrases

• CMOS Technology 100%
• PMOS 100%
• Latch-up 100%
• Decoupling Capacitor 100%
• Measurement Results 20%
• Capacitors 20%
• NMOS 20%
• Integrated Circuits 20%
• High Risk 20%
• Shunt 20%
• Varactor 20%
• Silicon chip 20%
• Layout Rule 20%
• Split Test 20%
• Powerline Noise 20%
• Non-typical 20%
• On-chip Decoupling Capacitor 20%

Computer Science

• Input/Output 100%
• Decoupling Capacitor 100%
• Integrated Circuit 16%

Engineering

• Decoupling Capacitor 100%
• Varactor 16%
• Power Line 16%
• Test Structure 16%
• Integrated Circuit 16%