Stochastic STT-MRAM Spiking Neuron Circuit

Fu Xiang Liang; Paritosh Sahu; Ming Hung Wu; Jeng Hua Wei; Shyh Shyuan Sheu; Tuo Hung Hou

doi:10.1109/VLSI-TSA48913.2020.9203701

Stochastic STT-MRAM Spiking Neuron Circuit

Fu Xiang Liang, Paritosh Sahu, Ming Hung Wu, Jeng Hua Wei, Shyh Shyuan Sheu, Tuo Hung Hou^*

^*Corresponding author for this work

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

6 Scopus citations

Abstract

We propose a compact STT-MRAM spiking neuron circuit that is a critical component of future hardware neural networks for accelerating deep learning. A SPICE compact model was established for the stochastic back-hopping oscillation of STT-MRAM, and the complete functionality of the spiking neuron circuit was demonstrated. Comparing to other emerging neuron circuits based on non-volatile memory (NVM) and the conventional capacitor-based integrate-and fire CMOS neuron circuit, this STT-MRAM spiking neuron circuit achieves the smallest area of 26 m by using the 65nm technology. For event-based spiking neural networks, this neuron circuit provides a competitive spiking rate of 100 kHz. For accurate analog-to-digital conversions in deep neural networks, this neuron circuit achieves a 4- bit resolution with minimal quantization error.

Original language	English
Title of host publication	2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	151-152
Number of pages	2
ISBN (Electronic)	9781728142326
DOIs	https://doi.org/10.1109/VLSI-TSA48913.2020.9203701
State	Published - Aug 2020
Event	2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020 - Hsinchu, Taiwan Duration: 10 Aug 2020 → 13 Aug 2020

Publication series

Name	2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020

Conference

Conference	2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020
Country/Territory	Taiwan
City	Hsinchu
Period	10/08/20 → 13/08/20

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10.1109/VLSI-TSA48913.2020.9203701

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Liang, F. X., Sahu, P., Wu, M. H., Wei, J. H., Sheu, S. S., & Hou, T. H. (2020). Stochastic STT-MRAM Spiking Neuron Circuit. In 2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020 (pp. 151-152). Article 9203701 (2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA48913.2020.9203701

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title = "Stochastic STT-MRAM Spiking Neuron Circuit",

abstract = "We propose a compact STT-MRAM spiking neuron circuit that is a critical component of future hardware neural networks for accelerating deep learning. A SPICE compact model was established for the stochastic back-hopping oscillation of STT-MRAM, and the complete functionality of the spiking neuron circuit was demonstrated. Comparing to other emerging neuron circuits based on non-volatile memory (NVM) and the conventional capacitor-based integrate-and fire CMOS neuron circuit, this STT-MRAM spiking neuron circuit achieves the smallest area of 26 m by using the 65nm technology. For event-based spiking neural networks, this neuron circuit provides a competitive spiking rate of 100 kHz. For accurate analog-to-digital conversions in deep neural networks, this neuron circuit achieves a 4- bit resolution with minimal quantization error.",

author = "Liang, {Fu Xiang} and Paritosh Sahu and Wu, {Ming Hung} and Wei, {Jeng Hua} and Sheu, {Shyh Shyuan} and Hou, {Tuo Hung}",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE. Copyright: Copyright 2020 Elsevier B.V., All rights reserved.; 2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020 ; Conference date: 10-08-2020 Through 13-08-2020",

year = "2020",

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doi = "10.1109/VLSI-TSA48913.2020.9203701",

language = "English",

series = "2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020",

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Liang, FX, Sahu, P, Wu, MH, Wei, JH, Sheu, SS & Hou, TH 2020, Stochastic STT-MRAM Spiking Neuron Circuit. in 2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020., 9203701, 2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020, Institute of Electrical and Electronics Engineers Inc., pp. 151-152, 2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020, Hsinchu, Taiwan, 10/08/20. https://doi.org/10.1109/VLSI-TSA48913.2020.9203701

Stochastic STT-MRAM Spiking Neuron Circuit. / Liang, Fu Xiang; Sahu, Paritosh; Wu, Ming Hung et al.
2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020. Institute of Electrical and Electronics Engineers Inc., 2020. p. 151-152 9203701 (2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - We propose a compact STT-MRAM spiking neuron circuit that is a critical component of future hardware neural networks for accelerating deep learning. A SPICE compact model was established for the stochastic back-hopping oscillation of STT-MRAM, and the complete functionality of the spiking neuron circuit was demonstrated. Comparing to other emerging neuron circuits based on non-volatile memory (NVM) and the conventional capacitor-based integrate-and fire CMOS neuron circuit, this STT-MRAM spiking neuron circuit achieves the smallest area of 26 m by using the 65nm technology. For event-based spiking neural networks, this neuron circuit provides a competitive spiking rate of 100 kHz. For accurate analog-to-digital conversions in deep neural networks, this neuron circuit achieves a 4- bit resolution with minimal quantization error.

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Liang FX, Sahu P, Wu MH, Wei JH, Sheu SS, Hou TH. Stochastic STT-MRAM Spiking Neuron Circuit. In 2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020. Institute of Electrical and Electronics Engineers Inc. 2020. p. 151-152. 9203701. (2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020). doi: 10.1109/VLSI-TSA48913.2020.9203701

Stochastic STT-MRAM Spiking Neuron Circuit

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