@inproceedings{6fdf80d3b9ea426180b5663ff402bb2c,
title = "State retention for power gated design with non-uniform multi-bit retention latches",
abstract = "Retention registers/latches are commonly applied to power-gated circuits for state retention during the sleep mode. Recent studies have shown that applying uniform multi-bit retention registers (MBRRs) can reduce the storage size, and hence save more chip area and leakage power compared with single-bit retention registers. In this paper, a new problem formulation of power-gated circuit optimization with nonuniform MBRRs is studied for achieving even more storage saving and higher storage utilization. An ILP-based approach is proposed to effectively explore different combinations of nonuniform MBRR replacement. Experiment results show that the proposed approach can reduce 36% storage size, compared with the state-of-the-art uniform MBRR replacement, while achieving 100% storage utilization.",
keywords = "Leakage power, Multi-bit, Power gating, Retention latch, Retention register, State retention",
author = "Fan, {Guo Gin} and Po-Hung Lin",
year = "2017",
month = dec,
day = "13",
doi = "10.1109/ICCAD.2017.8203833",
language = "English",
series = "IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "607--614",
booktitle = "2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017",
address = "United States",
note = "36th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017 ; Conference date: 13-11-2017 Through 16-11-2017",
}