Stacked-NMOS triggered silicon-controlled rectifier for ESD protection in high/low-voltage-tolerant I/O interface

Ming-Dou Ker; Chien Hui Chuang

doi:10.1109/LED.2002.1004236

Stacked-NMOS triggered silicon-controlled rectifier for ESD protection in high/low-voltage-tolerant I/O interface

Ming-Dou Ker^*, Chien Hui Chuang

^*Corresponding author for this work

Research output: Contribution to journal › Letter › peer-review

9 Scopus citations

Abstract

A stacked-NMOS triggered silicon-controlled rectifier (SNTSCR) is proposed as the electrostatic discharge (ESD) clamp device to protect the mixed-voltage I/O buffers of CMOS ICs. This SNTSCR device is fully compatible to general CMOS processes without using the thick gate oxide to overcome the gate-oxide reliability issue. ESD robustness of the proposed SNTSCR device with different layout parameters has been investigated in a 0.35-μm CMOS process. The HBM ESD level of the mixed-voltage I/O buffer with the stacked-NMOS channel width of 120 μm can be obviously improved from the original ∼ 2 kV to be greater than 8 kV by this SNTSCR device with a device dimension of only 60 μm/035 μm.

Original language	English
Pages (from-to)	363-365
Number of pages	3
Journal	Ieee Electron Device Letters
Volume	23
Issue number	6
DOIs	https://doi.org/10.1109/LED.2002.1004236
State	Published - Jun 2002

Keywords

ESD protection
Electrostatic discharge (ESD)
Mixed-voltage I/O buffer
Silicon-controlled rectifier (SCR)

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10.1109/LED.2002.1004236

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title = "Stacked-NMOS triggered silicon-controlled rectifier for ESD protection in high/low-voltage-tolerant I/O interface",

abstract = "A stacked-NMOS triggered silicon-controlled rectifier (SNTSCR) is proposed as the electrostatic discharge (ESD) clamp device to protect the mixed-voltage I/O buffers of CMOS ICs. This SNTSCR device is fully compatible to general CMOS processes without using the thick gate oxide to overcome the gate-oxide reliability issue. ESD robustness of the proposed SNTSCR device with different layout parameters has been investigated in a 0.35-μm CMOS process. The HBM ESD level of the mixed-voltage I/O buffer with the stacked-NMOS channel width of 120 μm can be obviously improved from the original ∼ 2 kV to be greater than 8 kV by this SNTSCR device with a device dimension of only 60 μm/035 μm.",

keywords = "ESD protection, Electrostatic discharge (ESD), Mixed-voltage I/O buffer, Silicon-controlled rectifier (SCR)",

author = "Ming-Dou Ker and Chuang, {Chien Hui}",

year = "2002",

month = jun,

doi = "10.1109/LED.2002.1004236",

language = "English",

volume = "23",

pages = "363--365",

journal = "Ieee Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "6",

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TY - JOUR

T1 - Stacked-NMOS triggered silicon-controlled rectifier for ESD protection in high/low-voltage-tolerant I/O interface

AU - Ker, Ming-Dou

AU - Chuang, Chien Hui

PY - 2002/6

Y1 - 2002/6

N2 - A stacked-NMOS triggered silicon-controlled rectifier (SNTSCR) is proposed as the electrostatic discharge (ESD) clamp device to protect the mixed-voltage I/O buffers of CMOS ICs. This SNTSCR device is fully compatible to general CMOS processes without using the thick gate oxide to overcome the gate-oxide reliability issue. ESD robustness of the proposed SNTSCR device with different layout parameters has been investigated in a 0.35-μm CMOS process. The HBM ESD level of the mixed-voltage I/O buffer with the stacked-NMOS channel width of 120 μm can be obviously improved from the original ∼ 2 kV to be greater than 8 kV by this SNTSCR device with a device dimension of only 60 μm/035 μm.

AB - A stacked-NMOS triggered silicon-controlled rectifier (SNTSCR) is proposed as the electrostatic discharge (ESD) clamp device to protect the mixed-voltage I/O buffers of CMOS ICs. This SNTSCR device is fully compatible to general CMOS processes without using the thick gate oxide to overcome the gate-oxide reliability issue. ESD robustness of the proposed SNTSCR device with different layout parameters has been investigated in a 0.35-μm CMOS process. The HBM ESD level of the mixed-voltage I/O buffer with the stacked-NMOS channel width of 120 μm can be obviously improved from the original ∼ 2 kV to be greater than 8 kV by this SNTSCR device with a device dimension of only 60 μm/035 μm.

KW - ESD protection

KW - Electrostatic discharge (ESD)

KW - Mixed-voltage I/O buffer

KW - Silicon-controlled rectifier (SCR)

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U2 - 10.1109/LED.2002.1004236

DO - 10.1109/LED.2002.1004236

M3 - Letter

AN - SCOPUS:0036609869

SN - 0741-3106

VL - 23

SP - 363

EP - 365

JO - Ieee Electron Device Letters

JF - Ieee Electron Device Letters

IS - 6

ER -

Stacked-NMOS triggered silicon-controlled rectifier for ESD protection in high/low-voltage-tolerant I/O interface

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Keywords

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