Size-Dependent Switching Properties of Spin-Orbit Torque MRAM with Manufacturing-Friendly 8-Inch Wafer-Level Uniformity

Sk Ziaur Rahaman; Yi Hui Su; Guan Long Chen; Fang Ming Chen; Jeng Hua Wei; Tuo Hung Hou; Shyh Shyuan Sheu; Chih I. Wu; Duan Lee Deng; I. Jung Wang; Ding Yeong Wang; Chi Feng Pai; Yu Chen Hsin; Shan Yi Yang; Hsin Han Lee; Yao Jen Chang; Yi Ching Kuo

doi:10.1109/JEDS.2020.2971892

Size-Dependent Switching Properties of Spin-Orbit Torque MRAM with Manufacturing-Friendly 8-Inch Wafer-Level Uniformity

Sk Ziaur Rahaman^*, Yi Hui Su, Guan Long Chen, Fang Ming Chen, Jeng Hua Wei, Tuo Hung Hou, Shyh Shyuan Sheu, Chih I. Wu, Duan Lee Deng, I. Jung Wang, Ding Yeong Wang, Chi Feng Pai, Yu Chen Hsin, Shan Yi Yang, Hsin Han Lee, Yao Jen Chang, Yi Ching Kuo

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to journal › Article › peer-review

14 Scopus citations

Abstract

We have developed a manufacturing-friendly spin-orbit torque magnetic random access memory (SOT-MRAM) technology in CMOS compatible 8-inch fab process. The proposed SOT-MRAM process technology resolves etching non-uniformity and reduction of high resistivity heavy-metal nanowire resistance issues. Besides, we present device size-dependent switching current threshold in the proposed SOT-MRAM cell structure. To realize the potential of our fabricated SOT-MRAM, wafer-level uniformity, cycling and temperature dependence SOT switching have been comprehensively investigated. Furthermore, the thermal stability factor ( ${\Delta }$ ) was calculated from temperature-dependence SOT switching to fulfill the thermal stability criteria, i.e., > 10 years of this emerging SOT-MRAM technology.

Original language	English
Article number	8984374
Pages (from-to)	163-169
Number of pages	7
Journal	IEEE Journal of the Electron Devices Society
Volume	8
DOIs	https://doi.org/10.1109/JEDS.2020.2971892
State	Published - 2020

Keywords

Spintronics
magnetic tunnel junction
spin-hall effect
spin-orbit torque
spin-transfer torque

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10.1109/JEDS.2020.2971892

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Rahaman, S. Z., Su, Y. H., Chen, G. L., Chen, F. M., Wei, J. H., Hou, T. H., Sheu, S. S., Wu, C. I., Deng, D. L., Wang, I. J., Wang, D. Y., Pai, C. F., Hsin, Y. C., Yang, S. Y., Lee, H. H., Chang, Y. J., & Kuo, Y. C. (2020). Size-Dependent Switching Properties of Spin-Orbit Torque MRAM with Manufacturing-Friendly 8-Inch Wafer-Level Uniformity. IEEE Journal of the Electron Devices Society, 8, 163-169. Article 8984374. https://doi.org/10.1109/JEDS.2020.2971892

@article{1374c3a3293642ec8a485eb14424d84c,

title = "Size-Dependent Switching Properties of Spin-Orbit Torque MRAM with Manufacturing-Friendly 8-Inch Wafer-Level Uniformity",

abstract = "We have developed a manufacturing-friendly spin-orbit torque magnetic random access memory (SOT-MRAM) technology in CMOS compatible 8-inch fab process. The proposed SOT-MRAM process technology resolves etching non-uniformity and reduction of high resistivity heavy-metal nanowire resistance issues. Besides, we present device size-dependent switching current threshold in the proposed SOT-MRAM cell structure. To realize the potential of our fabricated SOT-MRAM, wafer-level uniformity, cycling and temperature dependence SOT switching have been comprehensively investigated. Furthermore, the thermal stability factor ( ${\Delta }$ ) was calculated from temperature-dependence SOT switching to fulfill the thermal stability criteria, i.e., > 10 years of this emerging SOT-MRAM technology.",

keywords = "Spintronics, magnetic tunnel junction, spin-hall effect, spin-orbit torque, spin-transfer torque",

author = "Rahaman, {Sk Ziaur} and Su, {Yi Hui} and Chen, {Guan Long} and Chen, {Fang Ming} and Wei, {Jeng Hua} and Hou, {Tuo Hung} and Sheu, {Shyh Shyuan} and Wu, {Chih I.} and Deng, {Duan Lee} and Wang, {I. Jung} and Wang, {Ding Yeong} and Pai, {Chi Feng} and Hsin, {Yu Chen} and Yang, {Shan Yi} and Lee, {Hsin Han} and Chang, {Yao Jen} and Kuo, {Yi Ching}",

note = "Publisher Copyright: {\textcopyright} 2013 IEEE.",

year = "2020",

doi = "10.1109/JEDS.2020.2971892",

language = "English",

volume = "8",

pages = "163--169",

journal = "IEEE Journal of the Electron Devices Society",

issn = "2168-6734",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

Rahaman, SZ, Su, YH, Chen, GL, Chen, FM, Wei, JH, Hou, TH, Sheu, SS, Wu, CI, Deng, DL, Wang, IJ, Wang, DY, Pai, CF, Hsin, YC, Yang, SY, Lee, HH, Chang, YJ & Kuo, YC 2020, 'Size-Dependent Switching Properties of Spin-Orbit Torque MRAM with Manufacturing-Friendly 8-Inch Wafer-Level Uniformity', IEEE Journal of the Electron Devices Society, vol. 8, 8984374, pp. 163-169. https://doi.org/10.1109/JEDS.2020.2971892

TY - JOUR

T1 - Size-Dependent Switching Properties of Spin-Orbit Torque MRAM with Manufacturing-Friendly 8-Inch Wafer-Level Uniformity

AU - Rahaman, Sk Ziaur

AU - Su, Yi Hui

AU - Chen, Guan Long

AU - Chen, Fang Ming

AU - Wei, Jeng Hua

AU - Hou, Tuo Hung

AU - Sheu, Shyh Shyuan

AU - Wu, Chih I.

AU - Deng, Duan Lee

AU - Wang, I. Jung

AU - Wang, Ding Yeong

AU - Pai, Chi Feng

AU - Hsin, Yu Chen

AU - Yang, Shan Yi

AU - Lee, Hsin Han

AU - Chang, Yao Jen

AU - Kuo, Yi Ching

PY - 2020

Y1 - 2020

N2 - We have developed a manufacturing-friendly spin-orbit torque magnetic random access memory (SOT-MRAM) technology in CMOS compatible 8-inch fab process. The proposed SOT-MRAM process technology resolves etching non-uniformity and reduction of high resistivity heavy-metal nanowire resistance issues. Besides, we present device size-dependent switching current threshold in the proposed SOT-MRAM cell structure. To realize the potential of our fabricated SOT-MRAM, wafer-level uniformity, cycling and temperature dependence SOT switching have been comprehensively investigated. Furthermore, the thermal stability factor ( ${\Delta }$ ) was calculated from temperature-dependence SOT switching to fulfill the thermal stability criteria, i.e., > 10 years of this emerging SOT-MRAM technology.

AB - We have developed a manufacturing-friendly spin-orbit torque magnetic random access memory (SOT-MRAM) technology in CMOS compatible 8-inch fab process. The proposed SOT-MRAM process technology resolves etching non-uniformity and reduction of high resistivity heavy-metal nanowire resistance issues. Besides, we present device size-dependent switching current threshold in the proposed SOT-MRAM cell structure. To realize the potential of our fabricated SOT-MRAM, wafer-level uniformity, cycling and temperature dependence SOT switching have been comprehensively investigated. Furthermore, the thermal stability factor ( ${\Delta }$ ) was calculated from temperature-dependence SOT switching to fulfill the thermal stability criteria, i.e., > 10 years of this emerging SOT-MRAM technology.

KW - Spintronics

KW - magnetic tunnel junction

KW - spin-hall effect

KW - spin-orbit torque

KW - spin-transfer torque

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U2 - 10.1109/JEDS.2020.2971892

DO - 10.1109/JEDS.2020.2971892

M3 - Article

AN - SCOPUS:85080135665

SN - 2168-6734

VL - 8

SP - 163

EP - 169

JO - IEEE Journal of the Electron Devices Society

JF - IEEE Journal of the Electron Devices Society

M1 - 8984374

ER -

Size-Dependent Switching Properties of Spin-Orbit Torque MRAM with Manufacturing-Friendly 8-Inch Wafer-Level Uniformity

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Keywords

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