Single-fabrication-step Ge Nanosphere/SiO2/SiGe heterostructures: A key enabler for realizing Ge MOS devices

Po Hsiang Liao; Kang Ping Peng; Chia Tsong Chen; Horng-Chih Lin; Tom George; Pei-Wen Li

doi:10.1109/EDTM.2018.8421489

Single-fabrication-step Ge Nanosphere/SiO₂/SiGe heterostructures: A key enabler for realizing Ge MOS devices

Po Hsiang Liao, Kang Ping Peng, Chia Tsong Chen, Horng-Chih Lin, Tom George, Pei-Wen Li

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

We report channel and strain engineering of self-organized, gate-stacking heterostructures comprising Ge-nanosphere gate/SiO₂/SiGe-channels. An exquisitely controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials was exploited to simultaneously create these heterostructures in a single oxidation step. Single-crystalline (100)/(110) Si1-xGex shells with Ge content as high as x= 0.85/0.35 and with a compressive strain of 3%/1.5% were achieved. Our high Ge-content, highly-stressed SiGe shells feature a high degree of crystallinity, providing a 'building block' for the fabrication of Ge-based MOS devices.

Original language	English
Title of host publication	2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	254-256
Number of pages	3
ISBN (Print)	9781538637111
DOIs	https://doi.org/10.1109/EDTM.2018.8421489
State	Published - 26 Jul 2018
Event	2nd IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Kobe, Japan Duration: 13 Mar 2018 → 16 Mar 2018

Publication series

Name	2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings

Conference

Conference	2nd IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018
Country/Territory	Japan
City	Kobe
Period	13/03/18 → 16/03/18

Keywords

Ge
channel engineering and strain engineering

Access to Document

10.1109/EDTM.2018.8421489

Cite this

Liao, P. H., Peng, K. P., Chen, C. T., Lin, H.-C., George, T., & Li, P.-W. (2018). Single-fabrication-step Ge Nanosphere/SiO₂/SiGe heterostructures: A key enabler for realizing Ge MOS devices. In 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings (pp. 254-256). Article 8421489 (2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDTM.2018.8421489

Liao, Po Hsiang ; Peng, Kang Ping ; Chen, Chia Tsong et al. / Single-fabrication-step Ge Nanosphere/SiO₂/SiGe heterostructures : A key enabler for realizing Ge MOS devices. 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 254-256 (2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings).

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title = "Single-fabrication-step Ge Nanosphere/SiO2/SiGe heterostructures: A key enabler for realizing Ge MOS devices",

abstract = "We report channel and strain engineering of self-organized, gate-stacking heterostructures comprising Ge-nanosphere gate/SiO2/SiGe-channels. An exquisitely controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials was exploited to simultaneously create these heterostructures in a single oxidation step. Single-crystalline (100)/(110) Si1-xGex shells with Ge content as high as x= 0.85/0.35 and with a compressive strain of 3%/1.5% were achieved. Our high Ge-content, highly-stressed SiGe shells feature a high degree of crystallinity, providing a 'building block' for the fabrication of Ge-based MOS devices.",

keywords = "Ge, channel engineering and strain engineering",

author = "Liao, {Po Hsiang} and Peng, {Kang Ping} and Chen, {Chia Tsong} and Horng-Chih Lin and Tom George and Pei-Wen Li",

year = "2018",

month = jul,

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doi = "10.1109/EDTM.2018.8421489",

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series = "2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings",

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note = "2nd IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 ; Conference date: 13-03-2018 Through 16-03-2018",

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Liao, PH, Peng, KP, Chen, CT, Lin, H-C, George, T & Li, P-W 2018, Single-fabrication-step Ge Nanosphere/SiO₂/SiGe heterostructures: A key enabler for realizing Ge MOS devices. in 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings., 8421489, 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 254-256, 2nd IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018, Kobe, Japan, 13/03/18. https://doi.org/10.1109/EDTM.2018.8421489

Single-fabrication-step Ge Nanosphere/SiO₂/SiGe heterostructures: A key enabler for realizing Ge MOS devices. / Liao, Po Hsiang; Peng, Kang Ping; Chen, Chia Tsong et al.
2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2018. p. 254-256 8421489 (2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - We report channel and strain engineering of self-organized, gate-stacking heterostructures comprising Ge-nanosphere gate/SiO2/SiGe-channels. An exquisitely controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials was exploited to simultaneously create these heterostructures in a single oxidation step. Single-crystalline (100)/(110) Si1-xGex shells with Ge content as high as x= 0.85/0.35 and with a compressive strain of 3%/1.5% were achieved. Our high Ge-content, highly-stressed SiGe shells feature a high degree of crystallinity, providing a 'building block' for the fabrication of Ge-based MOS devices.

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Liao PH, Peng KP, Chen CT, Lin HC, George T, Li PW. Single-fabrication-step Ge Nanosphere/SiO₂/SiGe heterostructures: A key enabler for realizing Ge MOS devices. In 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2018. p. 254-256. 8421489. (2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings). doi: 10.1109/EDTM.2018.8421489