Simulation Study of 4H-SiC Trench MOSFETs with Various Gate Structures

Jheng Yi Jiang, Chih Fang Huang, Tian Li Wu, Feng Zhao

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

8 Scopus citations

Abstract

In this paper, we systematically study the effect of gate structures of a 4H-SiC UMOSFET on its performance, focusing on the fast switching performance. Based on the simulation results, DC and AC characteristics of different gate structures are compared. It is found that a structure of UMOSFET, combining a grounded split-gate (SG), a trench bottom protection P+ shielding layer (PS) and a current spreading layer (CSL), yields the best compromise.

Original languageEnglish
Title of host publication2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages401-403
Number of pages3
ISBN (Electronic)9781538665084
DOIs
StatePublished - Mar 2019
Event2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019 - Singapore, Singapore
Duration: 12 Mar 201915 Mar 2019

Publication series

Name2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019

Conference

Conference2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019
Country/TerritorySingapore
CitySingapore
Period12/03/1915/03/19

Keywords

  • Ciss
  • Coss
  • Crss
  • Qg
  • SiC UMOSFETs
  • split-gate

Fingerprint

Dive into the research topics of 'Simulation Study of 4H-SiC Trench MOSFETs with Various Gate Structures'. Together they form a unique fingerprint.

Cite this