Abstract
A substrate current model and a quasi-static hot-electron-induced MOSFET degradation model have been implemented in the Substrate Current And Lifetime Evaluator (SCALE). It is shown that quasi-static simulation is valid for a class of waveforms including those encountered in inverter-based logic circuits. The validity and limitations of the model are illustrated with experimental results. SCALE is linked to SPICE externally in a pre- and post-processors fashion to form an independent simulator. The pre-processor interprets the input deck and requests SPICE to output the transient node voltages of the user-selected devices. The post-processor then calculates the transient substrate current and makes a lifetime prediction.
Original language | English |
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Pages (from-to) | 1004-1011 |
Number of pages | 8 |
Journal | IEEE Transactions on Electron Devices |
Volume | 35 |
Issue number | 7 |
DOIs | |
State | Published - 1 Jan 1988 |