Abstract
In simulation-based functional verification, composing and debugging testbenches can be tedious and time-consuming. A simulation data-mining approach, called TTPG[3], was proposed as an alternative for functional test pattern generation. However, the core of simulation data-mining approach is Boolean learning, which tries to extract the simplified view of the design functionality according to the given bit-level simulation data. In this work, an efficient data-mining engine is presented based on decision-diagram(DD)-based learning approaches. We compare the DD-based learning approaches to other known methods, such as the Nearest Neighbor method and Support Vector Machine. We demonstrate that the proposed Boolean data miner is efficient for practical use. Finally, that the TTPG methodology incorporated with the Boolean data miner can achieve a high fault coverage (95.36%) on the OpenRISC 1200 microprocessor concludes the effectiveness of the proposed approach.
Original language | English |
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Pages | 300-307 |
Number of pages | 8 |
DOIs | |
State | Published - 2006 |
Event | 24th International Conference on Computer Design 2006, ICCD - San Jose, CA, United States Duration: 1 Oct 2006 → 4 Oct 2006 |
Conference
Conference | 24th International Conference on Computer Design 2006, ICCD |
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Country/Territory | United States |
City | San Jose, CA |
Period | 1/10/06 → 4/10/06 |